Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Bipolar transistor
Reexamination Certificate
2007-02-20
2007-02-20
Callahan, Timothy P. (Department: 2816)
Electronic digital logic circuitry
Function of and, or, nand, nor, or not
Bipolar transistor
C156S159000, C331S016000, C331S017000
Reexamination Certificate
active
10407632
ABSTRACT:
Method and apparatus for locking a phase lock loop, where the method includes selecting a frequency window corresponding to a VCO output frequency, selecting a control voltage corresponding to the frequency window and providing the control voltage to the control voltage circuit which subsequently uses the selected control voltage as the starting control voltage of the phase lock loop.
REFERENCES:
patent: 4584539 (1986-04-01), Stankey
patent: 5124671 (1992-06-01), Srivastava
patent: 5367269 (1994-11-01), Yanagidaira et al.
patent: 5648744 (1997-07-01), Prakash et al.
patent: 5686864 (1997-11-01), Martin et al.
patent: 5739730 (1998-04-01), Rotzoll
patent: 6091304 (2000-07-01), Harrer
patent: 6218876 (2001-04-01), Sung et al.
patent: 2002/0001361 (2002-01-01), Ueno et al.
patent: 2002/0118074 (2002-08-01), Jovenin
patent: 0599505 (1991-06-01), None
patent: WO 04/001975 (2003-12-01), None
Luu An T.
Townsend and Townsend / and Crew LLP
LandOfFree
Apparatus and method for decreasing the lock time of a lock... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for decreasing the lock time of a lock..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for decreasing the lock time of a lock... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3813462