Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-12-31
2000-04-18
Palys, Joseph E.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
712227, G06F 1100
Patent
active
060528028
ABSTRACT:
An apparatus and method for cycle accounting for a microprocessor are disclosed, in which a performance monitor includes a plurality of silos, a prioritizer, and a combiner. The silos receive delay reason signals from the main processor pipeline, and output staged signals. The prioritizer receives the staged signals, and outputs a plurality of prioritized signals. The combiner selectively combines various of the prioritize signals, and provides signals indicative of microprocessor performance. Each silo includes, in series, a plurality of stages, with each stage containing a single latch. The stages of the silo are synchronized with the stages of the main processor pipeline. The performance monitor operates in real-time, at the same frequency as the microprocessor, and in parallel to the main processor pipeline. Outputted signals include various signals indicative of microprocessor performance, for example, cache misses, branch mispredictions, and so forth, but only for those miss-events that contribute to a program's visible delay, thereby providing an accurate picture of where cycles are being wasted.
REFERENCES:
patent: 5187796 (1993-02-01), Wang et al.
patent: 5274717 (1993-12-01), Miura et al.
patent: 5305108 (1994-04-01), Trytko
patent: 5530809 (1996-06-01), Douglas et al.
patent: 5590337 (1996-12-01), Rahman et al.
patent: 5751945 (1998-05-01), Levine et al.
patent: 5797019 (1998-08-01), Levine et al.
patent: 5894575 (1999-04-01), Levine et al.
patent: 5896538 (1999-04-01), Blandy et al.
patent: 5919268 (1999-07-01), McDonald
patent: 5922070 (1999-07-01), Swoboda
patent: 6000044 (1999-12-01), Chrysos et al.
Hummel Vincent E.
Kling Ralph M.
Yeh Tse-Yu
Zahir Achmed R.
Intel Corporation
Mai Rijue
Palys Joseph E.
LandOfFree
Apparatus and method for cycle accounting in microprocessors does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for cycle accounting in microprocessors, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for cycle accounting in microprocessors will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2345696