Apparatus and method for counting high-speed early/late...

Details Apparatus and method for counting high-speed early/late... Apparatus and method for counting high-speed early/late...

2005-08-30

2005-08-30

Burd, Kevin (Department: 2631)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

Reexamination Certificate

active

06937685

ABSTRACT:
The method and device according to the present invention provides a control system, method and apparatus for synchronizing a reference signal to high frequency data signals. Pulses are accumulated before reaching the integrator. Pulse accumulation is provided in a DLL clock and data recovery circuit. Pulses are accumulated using a ripple divider for rising transitions only. In another exemplary embodiment, pulses are accumulated using a ripple divider for both rising and falling transitions.

REFERENCES:
patent: 5463351 (1995-10-01), Marko et al.
patent: 5757297 (1998-05-01), Ferraiolo et al.
patent: 5923704 (1999-07-01), Schnizlein
patent: 6038254 (2000-03-01), Ferraiolo et al.
patent: 6087868 (2000-07-01), Millar
patent: 6167526 (2000-12-01), Carlson
patent: 6337590 (2002-01-01), Millar

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