Apparatus and method for controlling the loop bandwidth of a pha

Details Apparatus and method for controlling the loop bandwidth of a pha Apparatus and method for controlling the loop bandwidth of a pha

1993-12-17

1997-12-30

Grimm, Siegried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

331 17, 331 25, 331DIG2, H03L 7093, H03L 718

Patent

active

057035393

ABSTRACT:
In a phase locked loop (PLL) (308), an edge proximity detector (302) identifies a phase error, indicative of a difference between a phase of a reference frequency signal (115) and a phase of an output frequency signal (116 or 117), as either desirable or undesirable. When the phase error is identified as desirable, a counter (301) determines a rate of change of the phase error over a first predetermined time period (412) to provide an indication of frequency error (306) between the frequency of the reference frequency signal (206) and the frequency of the output frequency signal (116 or 117); and a loop bandwidth adjuster (310) controls a transition between a first and a second loop bandwidth state of the PLL (308) responsive to the indication of the frequency error (306). When the phase error is identified as undesirable, the PLL (308) operates in the second loop bandwidth state. The present invention advantageously provides an accurate determination of when to vary the loop bandwidth of the PLL (308).

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patent: 5151665 (1992-09-01), Wentzler
patent: 5208546 (1993-05-01), Nagaraj et al.

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