Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration
Reexamination Certificate
1998-08-03
2001-10-16
Shalwala, Bipin (Department: 2673)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
C713S100000
Reexamination Certificate
active
06304964
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus and a method for controlling a processor system, particularly for controlling initialization of a processor system.
When a processor system using a general-purpose microprocessor becomes short of processing capability, the microprocessor is usually replaced by a more powerful one to improve the performance of the system (called processor replacement). The usual method used in this case is to replace an old microprocessor which has been used so far by a new one which is higher of the series or more powerful of the same type. However, when the system is already equipped with the highest, i.e., most powerful microprocessor of the series, this method is useless.
Accordingly, to improve the system performance, a method is being practiced in recent years to replace the old microprocessor by a new one even if it is of a quite different type or architecture. The most serious problem when changing between microprocessors of different architecture is that operations to start an initialization program differ depending on the architecture. The initialization program sets various initial values in the system based on a power-on reset signal generated when power is turned on or based on a reset signal generated when a reset key on a keyboard or operator console is pressed. Therefore, an economical and effective apparatus and method for controlling initialization of a processor system is in great demand.
2. Description of the Related Art
FIGS. 1 and 2
show system configurations, particularly main memory configurations (i.e., memory maps), respectively of an old system having an old microprocessor and a new system having a new microprocessor which has replaced the old one. A bus converter (BUS CONV) is provided in the new system to overcome the architectural differences between the old and new microprocessors.
In
FIG. 1
, the old system has a control area allocated in the low-order address area for use by control circuits which control input and output devices for example, and has an initialization program allocated in the high-order address area. In
FIG. 2
in contrast, the new system has the new microprocessor designed to store the initialization program in the low-order address area (e.g., the area starting with address
0
) and eventually, the initialization program area overlaps with the aforesaid control area originally allocated for the old system.
The bus converter in
FIG. 2
converts the bus construction and protocol of the new microprocessor so that it looks logically and operationally the same as the old one from the main memory controller, control circuits, external bus interface controller and devices connected thereto (hereinafter generally called existing circuits).
Thus, the bus converter may solve the problems with normal operations such as access operations between the processor and existing circuits. However, if the new (or replacing) microprocessor has peculiar operations differing from the old (or replaced) one, as in interrupt processing, exception processing, external register access and reset operations, a problem how to overcome the above operational differences remains even with the bus converter.
A reset operation re-sets the system to an initial state based on a power-on reset signal output when power is turned on or a reset signal output when a reset key is pressed (hereinafter, generally called a reset signal). For the interrupt processing, exception processing and external register access operations, the aforesaid differences can often be overcome by means of memory address allocation, protocol conversion and introduction of a virtual space. Moreover, those means might often be executed in the initialization program. However, the problem with the reset operation cannot be solved so easily even by these means.
The reset operation executes the initialization program to set the system to an initial state based on the reset signal. The reset operation starts the initialization operation from a predetermined unique address called an operation-starting address, which differs from a general-purpose microprocessor to another. For example, a microprocessor starts the operation from address 00000000, whereas another starts from FFFFF000 and still another from FF000000 and so forth.
As for a 32-bit microprocessor, the address space amounts to as huge as 2 to the 32th power (approx. 4 billions or 4,000,000,000). Usual systems use only a part of this huge space for a main memory and therefore, there is a possibility that:
(1) an address space where the main memory is not provided for the old system (the space outside of the main memory area in
FIG. 2
) may be the operation-starting address for the new processor, or
(2) an address area which is already allocated as the control area for the old system overlaps with the operation-starting address of the new processor.
Conventionally, the following measures were taken, respectively against above cases (1) and (2):
(1) A memory device was newly added for an area including the operation-starting address, i.e., for the initialization program area.
(2) An address converter circuit was provided additionally in the bus converter to forcibly convert the address of the initialization program of the new system into that of the old system only when the initialization program was running, i.e., during the reset operation. Then, when the program was completed, the address converter circuit was stopped converting to restore to normal addressing.
Therefore, a problem is that it is uneconomical to add a memory device for the initialization program area according to method (1) because it requires a great amount of hardware and the area where the initialization program was originally stored is left unused. Another problem is that providing the address converter circuit according to method (2) not only increases hardware amount in itself, but renders the circuitry complex and causes a decrease in operation speed of the system in a normal mode, thus making the system uneconomical and decreasing the. system performance.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an apparatus and a method for controlling initialization of a processor system, which can achieve the reset operation economically, efficiently and effectively even when old and new processors differ in architecture from each other.
To achieve the above and other objects, the present invention provides detector means and generator means.
In an apparatus for controlling initialization of a processor system having a memory device which reads data and outputs the read data to a data bus based on a memory request signal and having a processor which outputs the memory request signal to read an initialization program stored in the memory device based on a reset signal, the detector means detects the memory request signal output by the processor. Based on the detection by the detector, the generator means generates initiation information for starting the initialization program and outputs the information to the data bus.
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Fujitsu Limited
Helfgott & Karas, P C.
Patel Nitin
Shalwala Bipin
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