Apparatus and method for controlling flash memories

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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Details

C711S103000, C711S156000, C711S165000

Reexamination Certificate

active

07136986

ABSTRACT:
In accordance with an embodiment of the present invention, control device and method are disclosed for reducing unnecessary data backup and restoring operations and increasing data read and write speed in a flash memory. The method includes writing data received from the host system to the flash memory; moving valid data in the basic block to the first link block when a use ratio of the first link block is greater than a reference value; and moving valid data in the first link block to the second link block when a use ratio of the first link block is less than the reference value. The control device includes means for simultaneously enabling, when data received from a host system is two or more sector data for different memory units, so that the two sector data are programmed concurrently into the enabled memory units; and means for enabling, when data received from the host system is one sector data, one memory unit addressed to receive the sector data and for programming the received sector data into the memory unit.

REFERENCES:
patent: 6742078 (2004-05-01), Chien et al.
patent: 6771313 (2004-08-01), Haruki
patent: 6792501 (2004-09-01), Chen et al.
patent: 2001/0012222 (2001-08-01), Terasaki

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