Apparatus and method for checking logic circuit

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364489, 364578, H03K 1760

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active

056711484

ABSTRACT:
An apparatus and method for checking logic circuit checks logic element influenced by hot carriers in the logic circuit. The present invention comprises means for measuring rising transition time t.sub.r (or falling transition time t.sub.f) of signal generated by logic element comprising one portion of the logic circuit; means for calculating a ratio (DUTY) of rising transition time t.sub.r (or falling transition time t.sub.f) and operation period T of the signal; and means for comparing said DUTY with maximum allowable duty (DUTYMAX), in order to detect the logic element having DUTY exceeding maximum allowable duty (DUTYMAX).

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patent: 5223733 (1993-06-01), Doi et al.
patent: 5295088 (1994-03-01), Hartoog et al.
patent: 5473548 (1995-12-01), Omori et al.
Solid State Pulse Circuits 2nd-ed., David A. Bell, Reston Pub Co., 1981 pp. 8-11 + 98-107.

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