Apparatus and method for capturing serial input data

Details Apparatus and method for capturing serial input data Apparatus and method for capturing serial input data

2006-12-06

2010-10-19

Kindred, Alford W (Department: 2181)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output command process

C710S007000, C710S110000, C365S230060

Reexamination Certificate

active

07818464

ABSTRACT:
A serial input processing apparatus provides how to capture serial data without loss of a single bit while command interpretation is being performed in a command decoder at high frequency. Individual bytes of serial bits of a pre-defined sequence are latched and bit streams are temporarily stored with multiple clocks. The temporary store is conducted before transferring byte information to assigned address registers to register the address. The address registration and the data registration are performed by latching all bit streams of the serial input at the leading edges of clocks. While at a high frequency operation (e.g., 1 GHz or 1 ns cycle time), no additional registers are required for storing bit data during command interpretation with enough time margins between the command bit stream interpretation and next bit data stream.

REFERENCES:
patent: 4174536 (1979-11-01), Misunas et al.
patent: 4733376 (1988-03-01), Ogawa
patent: 4796231 (1989-01-01), Pinkham
patent: 4816996 (1989-03-01), Hill et al.
patent: 4899316 (1990-02-01), Nagami
patent: 5038299 (1991-08-01), Maeda
patent: 5126808 (1992-06-01), Montalvo et al.
patent: 5136292 (1992-08-01), Ishida
patent: 5168556 (1992-12-01), Lajtai et al.
patent: 5175819 (1992-12-01), Le Ngoc et al.
patent: 5243703 (1993-09-01), Farmwald et al.
patent: 5280539 (1994-01-01), Yeom et al.
patent: 5365484 (1994-11-01), Cleveland et al.
patent: 5404460 (1995-04-01), Thomsen et al.
patent: 5440694 (1995-08-01), Nakajima
patent: 5452259 (1995-09-01), McLaury
patent: 5473563 (1995-12-01), Suh et al.
patent: 5473577 (1995-12-01), Miyake et al.
patent: 5596724 (1997-01-01), Mullins et al.
patent: 5602780 (1997-02-01), Diem et al.
patent: 5636342 (1997-06-01), Jeffries
patent: 5671178 (1997-09-01), Park et al.
patent: 5721840 (1998-02-01), Soga
patent: 5740379 (1998-04-01), Hartwig
patent: 5761146 (1998-06-01), Yoo et al.
patent: 5771199 (1998-06-01), Lee
patent: 5802006 (1998-09-01), Ohta
patent: 5818785 (1998-10-01), Ohshima
patent: 5828899 (1998-10-01), Richard et al.
patent: 5835935 (1998-11-01), Estakhri et al.
patent: 5859809 (1999-01-01), Kim
patent: 5872994 (1999-02-01), Akiyama et al.
patent: 5937425 (1999-08-01), Ban
patent: 5941974 (1999-08-01), Babin
patent: 5959930 (1999-09-01), Sakurai
patent: 5995417 (1999-11-01), Chen et al.
patent: 6002638 (1999-12-01), John
patent: 6085290 (2000-07-01), Smith et al.
patent: 6091660 (2000-07-01), Sasaki et al.
patent: 6107658 (2000-08-01), Itoh et al.
patent: 6128703 (2000-10-01), Bourekas et al.
patent: 6144576 (2000-11-01), Leddige et al.
patent: 6148364 (2000-11-01), Srinivasan et al.
patent: 6178135 (2001-01-01), Kang
patent: 6304921 (2001-10-01), Rooke
patent: 6317350 (2001-11-01), Pereira et al.
patent: 6317352 (2001-11-01), Halbert et al.
patent: 6438064 (2002-08-01), Ooishi
patent: 6442098 (2002-08-01), Kengeri
patent: 6535948 (2003-03-01), Wheeler et al.
patent: 6584303 (2003-06-01), Kingswood et al.
patent: 6594183 (2003-07-01), Lofgren et al.
patent: 6601199 (2003-07-01), Fukuda et al.
patent: 6611466 (2003-08-01), Lee et al.
patent: 6658582 (2003-12-01), Han
patent: 6680904 (2004-01-01), Kaplan et al.
patent: 6715044 (2004-03-01), Lofgren et al.
patent: 6732221 (2004-05-01), Ban
patent: 6754807 (2004-06-01), Parthasarathy et al.
patent: 6763426 (2004-07-01), James et al.
patent: 6769039 (2004-07-01), Shiraishi
patent: 6807103 (2004-10-01), Cavaleri et al.
patent: 6816933 (2004-11-01), Andreas
patent: 6850443 (2005-02-01), Lofgren et al.
patent: 6853557 (2005-02-01), Haba et al.
patent: 6853573 (2005-02-01), Kim et al.
patent: 6928501 (2005-08-01), Andreas et al.
patent: 6944697 (2005-09-01), Andreas
patent: 6950325 (2005-09-01), Chen
patent: 6967874 (2005-11-01), Hosono
patent: 6996644 (2006-02-01), Schoch et al.
patent: 7073022 (2006-07-01), El-Batal et al.
patent: 7161842 (2007-01-01), Park
patent: 7539909 (2009-05-01), LeClerg et al.
patent: 2002/0087708 (2002-07-01), Low et al.
patent: 2003/0074505 (2003-04-01), Andreas et al.
patent: 2004/0001380 (2004-01-01), Becca et al.
patent: 2004/0019736 (2004-01-01), Kim et al.
patent: 2004/0024960 (2004-02-01), King et al.
patent: 2004/0039854 (2004-02-01), Estakhri et al.
patent: 2004/0148482 (2004-07-01), Grundy et al.
patent: 2004/0199721 (2004-10-01), Chen
patent: 2004/0230738 (2004-11-01), Lim et al.
patent: 2004/0256638 (2004-12-01), Perego et al.
patent: 2005/0120163 (2005-06-01), Chou et al.
patent: 2005/0160218 (2005-07-01), See et al.
patent: 2005/0166006 (2005-07-01), Talbot et al.
patent: 2005/0213421 (2005-09-01), Polizzi et al.
patent: 2006/0031593 (2006-02-01), Sinclair
patent: 2007/0041255 (2007-02-01), Jeddeloh
patent: 0169411 (2001-09-01), None
patent: WO 0209405 (2002-01-01), None
International Search Report of PCT/CA2007/002183 dated Apr. 7, 2008.
“Toshiba MOS Digital Integrated Circuit Silicon Gate CMOS”, TH58NVG1S3AFT05, Toshiba Corporation, May 19, 2003 pp. 1-32.
“Intel® Advanced+ Boot Black Memory Flash (C3)”, May 2005, Intel Corporation, pp. 1-72.
“256 M×8 Bit/ 128m×16 Bit/ 512M×8 Bit NAND Flash Memory” K9K4G08U1M, K9F2G08U0m, K9F2G16U0m, Rev. 1.0, Samsung Electronics Co., Ltd., May 6, 2005, pp. 1-41.
King, et al.,“Communicating with Daisy Chained MCP42XXX Digital Potentiometers”, Microchip AN747, pp. 1-8, 2001.
“High Speed Small Sectored SPI Flash Memory,” Atmel Corp., pp. 1-22 (2006).
64 Megabit CMOS 3.0 Volt Flash Memory with 50 MHz SPI, Spansion, 2006, pp. 1-22.
“DiskOnChip H1 4Gb (512MByte) and 8 Gb (1 Gbyte) High Capacity Flash Disk with NAND and x2 Technology,” Data Sheet, Rev. 0.5 (preliminary), M-Systems Flash Disk Pioneers Ltd., pp. 1-66, (2005).
Tal, A., “Guidelines for Integrating DiskOnChip in a Host System,” AO-DOC-1004, Rev. 1.0, M-Systems Flash Disk Pioneers Ltd., pp. 1-15, (2004).
OneNAND4G(KFW4G16Q2M-DEB6), OneNAND2G(KFH2G16Q2M-DEB6), One NAND1G(KFW1G16Q2M-DEB6) Flash Memory, OneNAND™ Specification Ver. 1.2, Samsung Electronics, pp. 1-125, (Dec. 23, 2005).
Kennedy, J., et al., “A 2Gb/s Point-to-Point Heterogeneous Voltage Capable DRAM Interface for Capacity-Scalable Memory Subsystems,” ISSCC 2004/Session 1/Dram/11.8, IEEE International Solid-State Circuites Conference (2004), vol. 1, pp. 214-523.
Kim, Jae-Kwan, et al., “A 3.6 Gb/s/pin Simulataneous Bidirectional (SBD) I/O Interface for High-Speed Dram”, ISSCC 2004/Session 22/DSL and Multi-Gb/s I/O 22.7, IEEE International Solid State Circuits Conference (2004), vol. 1, pp. 414-415.
“Hyper Transport TM I/O Link Specification”, Revision 2.00, Document No. HTC20031217-0036-00, HyperTransportTM Technology Consortium, pp. 1-325 (2001).
“IEEE Standard for High-Bandwidth Memory Interface Based on Scalable Coherent Interface (SCI) Signaling Technology (RamLink)”, IEEE Std. 1596.4-1996, The Institute of Electrical Electronics Engineers, Inc., pp. i-91, (Mar. 1996).
Oshima et al.“High Speed Memory Architectures for Multimedia Applications”, Circuits Devices, IEEE 8755/3996/97/, pp. 18-13, Jan. 1997.
Gjessing, S., et al., “RamLink: A High-Bandwidth Point-to-Point Memory Architecture”, IEEE 0-8186-2655-0/92, pp. 328-331, Feb. 24-28, 1992.
Gjessing, S., et al., “RamLink: A High-Bandwidth Point-to-Point Memory Architecture”, Proceedings of the Twenty-Seventh Annual Hawaii International Conference on System Sciences, IEEE 1060-3424/94, pp. 154-162, 1994.
Gjessing, S., et al., “A RAM link for high speed”, Special Report/Memory, IEEE Spectrum, pp. 52-53, (Oct. 1992).
Diamond, S.L., “SyncLink: High-speed DRAM for the future”, Micro Standards, IEEE Micro, pp. 74-75, (Dec. 1996).
“DDR2 Fully Buffered DIMM 240pin FBDIMMS based on 512Mb C-die”, Rev. 1.3 Sep. 2006, Samsung Electroncs, pp. 1-32 (Sep. 2006).
“Hyper Transport TM I/O Link Specification”, Revision 3.00, Document No. HTC20051222-0046-0008, HyperTransport Technology Consortium, pp. 1-428 (Apr. 2006).

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