Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data...
Reexamination Certificate
2006-09-12
2006-09-12
Browne, Lynne H. (Department: 2116)
Electrical computers and digital processing systems: support
Clock control of data processing system, component, or data...
C710S033000, C710S071000, C341S100000, C341S101000
Reexamination Certificate
active
07107479
ABSTRACT:
A hybrid serial/parallel bus interface method and apparatus for a base station has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The method/apparatus is adaptable for either bidirectional or unidirectional applications.
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Axness Timothy A.
Gredone Joseph
Stufflet Alfred W.
Browne Lynne H.
InterDigital Technology Corporation
Patel Nitin C.
Volpe and Koenig P.C.
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