Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Patent
1994-08-31
1996-03-26
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
365149, 36518911, 36518905, G11C 702
Patent
active
055026710
ABSTRACT:
In a dynamic random access memory in which the number of data buffers is selectable, a buffer supply can be configured by a control signal to provide pump charge capacitance which is appropriate for providing the power required for energizing the selected number of buffers. In response to an external control signal, a second capacitor (or capacitor bank) can be precharged and then applied to the output terminal of buffer supply simultaneously with the precharging and application of the charge on the first capacitor. The dimension of the first capacitor is suitable for a buffer supply for the first buffer configuration and the second capacitor is suitable for a buffer supply for additional buffer amplifiers of the second configuration.
REFERENCES:
patent: 4964082 (1990-10-01), Sato et al.
patent: 5072134 (1991-12-01), Min
patent: 5258956 (1993-11-01), Ahn et la.
patent: 5304859 (1994-04-01), Arimoto
Koelling Jeffrey E.
McAdams Hugh P.
Donaldson Richard L.
Heiting Leo N.
Holloway William W.
Le Vu A.
Nelms David C.
LandOfFree
Apparatus and method for a semiconductor memory configuration-de does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for a semiconductor memory configuration-de, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for a semiconductor memory configuration-de will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-921249