Apparatus and method for a peripheral inter-module event...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral monitoring

Reexamination Certificate

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Details

C714S047300

Reexamination Certificate

active

06785749

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to microprocessor systems and, more particularly, to digital signal processor systems having a plurality of peripheral modules associated therewith. The peripheral modules of interest are interface modules that receive signals from sensor components, such as encoder units, that monitor parameters of external devices such as motors. The peripheral modules generate control signals that control external components. The control signals can activate elements such as switching power components.
2. Background of the Invention
The digital signal processor has proven to be well suited for inclusion in data processing systems wherein activity of an external device is monitored and controlled by the data processing system. In response to the signals from sensor elements monitoring the external device, appropriate status/event signals can be identified and, based on the status/event signals, control signals can be generated controlling the operation of the external component. For example, the status/event signals from the sensors/encoder units can be a train of pulses monitoring the operation of a motor and these identified status/event signals can be used to generate control signals that control the operation of the motor.
Referring to
FIG. 1A
, a processing system
1
for monitoring and controlling the activity of an external component
3
is shown. The processing system
1
includes a central processing unit
10
, typically a digital signal processor core, and a peripheral device bus
5
. Coupled to the peripheral device bus
5
are, for example, a memory unit
12
, a serial communication interface (SCI) unit
13
, a serial peripheral interface (SPI) unit
14
, a multi-channel buffered serial port
15
, an analog-to-digital converter (ADC) module
16
, an encoder interface module
17
, an event manager module
18
, and a signal transition event capture module
19
. The analog to digital module
16
, the encoder interface module
17
, the event manager module
18
and the signal transition capture module
19
receive signals from sensor units monitoring the external component
3
. The event manager module
18
applies (control) signals to the component device
3
.
The memory unit
12
provides for storage of data signal groups required by or generated by, the central processing unit
10
. The serial interface communication unit
13
, the serial peripheral interface unit
14
, and the multi-channel serial buffer unit
15
are interface modules that permit exchange of signals with other processing, communication, and display units (not shown). The analog to digital converter module
16
receives signals from a sensor unit in an analog format and converts these signals to a digital format for processing by the central processing unit
10
. The encoder interface module
17
receives and processes signals from an encoder unit. The encoder interface module
17
has at least one group of signals applied thereto that is typically in the form of a series of pulses. For example, the series of pulses can provide timing and direction signals from an encoder unit monitoring a rotating shaft. The encoder interface unit
17
provides position and speed information about a monitored shaft rotation. The event manager module
18
, according to one embodiment, can include a timer (or timers), compare unit(s) and other interface components. The event manager module
18
provides, among other activities, control signals to the external device
3
based on commands received from the central processing unit
10
. The signal transition capture module
19
provides apparatus for associating preselected transition/events in the external apparatus with a time designation or time stamp.
Referring to
FIG. 1B
, an example of an external device
7
to which the interface modules can be advantageously coupled. The external device is a three-phase motor
75
. The three-phase motor
75
is energized by an alternating voltage source that is applied to input terminals of rectifier
71
. Coupled across the output terminals of rectifier
71
are a capacitor
72
and three pairs of power transistors
73
A and
73
B,
73
C and
73
D, and
73
E and
73
F, coupled in series. Each of the pairs of power transistors
73
A and
73
B,
73
C and
73
D, and
73
E and
73
F is coupled to the one of the three energizing coils of the motor. Hall effect sensors
76
associated with the motor
75
generate a series of pulses related to the rotation of the rotor of motor
75
. These signals are applied to signal transition capture module
19
. The current in the individual coils of the three-phase motor
71
can be monitored by current sensors
74
A,
74
B, and
74
C. The signals from the current sensors
74
A,
74
B, and
74
C are coupled through isolation element
81
to input terminals of the analog to digital convert module
16
. Alternatively, the current can be monitored by resistances
731
,
732
, and
733
coupled in series with each of the power transistor pairs transistors
73
A and
73
B,
73
C and
73
D, and
73
E and
73
F, respectively. The voltages across these resistances
731
,
732
, and
733
can be applied to the analog to digital converter module
16
. When the voltages across the resistances
731
,
732
and
733
are sampled when the coupled power transistor (of the pair of power transistors) is conducting, an approximation of the current through the motor winding for each phase can be obtained. An optical encoder sensor
79
can optically monitor the rotation of the shaft (rotor)
751
of motor
75
. Typically, the output signals of the optical encoder
79
are a first series of pulses related to the rotational speed of the motor shaft and a second series of pulses defining the direction of the rotation. The signals from the optical encoder are applied to encoder interface module
17
. The control signals applied to the base terminals of the power transistor pairs
73
A and
73
B,
73
C and
73
D, and
73
E and
73
F originate in event manager unit
18
and are applied, through driver circuits
77
.
While the forgoing data processing system
1
can acquire signals from an external component, determine status/event information, and provide control signals to the external components, greater flexibility and computational power is required. In particular, inter-module communication has proven necessary for coordinating activity of the modules. For example, a specific parameter/event identified by the encoder interface module may be the parameter/event that triggers the activation of the analog to digital converter module
16
. In the prior art, to activate the analog to digital converter module
16
based on a parameter identified by the encoder interface module
17
, the central processing unit
10
would have to retrieve the parameter from the encoder interface module
17
by means of the peripheral device bus
5
. The central processing unit
10
would then determine whether further action was indicated. In the present example, the further action is activation of the analog to digital converter module
16
. The central processing unit
10
would then interact with the analog to digital converter module
16
by the peripheral device bus
5
to begin operation of the analog to digital converter module
16
. The involvement of the central processing unit
10
and the device peripheral bus
5
increases the complexity of the system. Appropriate protocols must be present to provide the communication between the encoder interface module
17
and the central processing unit
12
to bring an identified event to the central processing unit
12
. For example, the central processing unit
10
can periodically interrogate the encoder interface module
17
or the encoder interface module can place an interrupt signal on the peripheral device bus
5
. Once the identified event is transferred to the central processing unit
12
, the central processing unit must determine the appropriate response to the presence of the identified event and gen

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