Apparatus and method for a jitter cancellation circuit

Details Apparatus and method for a jitter cancellation circuit Apparatus and method for a jitter cancellation circuit

2006-11-07

2006-11-07

Corrielus, Jean B. (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S354000, C370S516000

Reexamination Certificate

active

07133483

ABSTRACT:
The invention produces an output signal that maintains a substantially constant period corresponding to a clock signal. An input signal includes a period that is an integer multiple of the period of the clock signal. The timing or phase of the input signal may shift in comparison to the clock signal resulting in jitter. The invention detects and cancels the jitter by varying a delay between the input signal and the output signal. The delay corresponds to an integer multiple of the period of the clock signal such that a substantially constant period is maintained for the output signal. Alternatively, the intended period for the output signal may be adjusted to match a new period when a determination is made that a sufficient difference exists between the new period of the input signal and the intended period.

REFERENCES:
patent: 5309428 (1994-05-01), Copley et al.
patent: 5859634 (1999-01-01), Ou et al.

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