Static information storage and retrieval – Read/write circuit – Differential sensing
Patent
1997-06-25
1998-10-13
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Differential sensing
365208, 36523003, G11C 702, G11C 800
Patent
active
058222626
ABSTRACT:
In a dynamic random access memory unit, the voltage difference between bitline pairs, resulting from the transfer of charge between the bitline pair and a memory array (5.sub.L), is amplified by an associated sense amplifier unit (10.sub.L). A multiplicity of sense amplifier units (10.sub.1 -10.sub.M) are activated by a sense amplifier driver circuit. (16, 18, 15 and 17) in typical operation. During a first period of time, a first transistor circuit (15 and 17) of the sense amplifier driver unit capable of providing a limited amount of charging current, activates the sense amplifier units (10.sub.1 -10.sub.M). During a second period of time, the first transistor unit (15 and 17) and a second larger transistor unit (16, 18) activate the sense amplifier units. In order to provide a more effective activation during the first period, function of the first transistor circuit (15, 17) is performed by a plurality of transistor circuits (15.sub.1 -15.sub.L, 17.sub.1 -17.sub.N) distributed along the conductors activating the sense amplifier units. During the first and second periods, transistors switches (9.sub.1 -9.sub.M, 9.sub.1 '-9.sub.M ') isolate portions of the bitline pair from the sense amplifier units, eliminating the necessity for the sense amplifier to charge the isolated portion of the bitline pairs.
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Abe Keiichiroh
Hashimoto Masashi
Donaldson Richard L.
Holland Robby T.
Holloway William W.
Nelms David C.
Phan Trong
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