Apparatus and method for a direct-sense sense-amplifier with dec

Details Apparatus and method for a direct-sense sense-amplifier with dec Apparatus and method for a direct-sense sense-amplifier with dec

1996-11-25

1998-11-03

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

365149, G11C 700

Patent

active

058319190

ABSTRACT:
In a dynamic random access memory, a sense amplifier has direct sense circuitry (MNRD, MNRD.sub.--, MNYSR, MNYSR.sub.--, MNYSW, MNYSR.sub.--) included therewith to minimize the effect of the parasitic impedances of the local INPUT/OUTPUT lines RES.sub.-- LIO, RES.sub.-- LIO.sub.--). The WRITE-ENABLE signal and the READ-ENABLE signal are each combined with the Y-SELECT signal to provide a Y-SELECT-READ and a Y-SELECT-WRITE signal. Each of these two signals, along with their complementary logic signals, control a transistor pair (MNYSR, MNYSR.sub.-- ; MNYSW, MNYSR.sub.--) in the direct sense circuitry, coupling the sense amplifier and the local INPUT/OUTPUT lines (RES.sub.-- LIO, RES.sub.-- LIO.sub.--). Because the original signal set had three enabling signals (along with their complements), the present implementation eliminates a transistor pair in the direct sense circuitry.

REFERENCES:
patent: 4980863 (1990-12-01), Ogihara
patent: 5561626 (1996-10-01), Fujii
patent: 5568434 (1996-10-01), Jeon
patent: 5574696 (1996-11-01), Murotani

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