Apparatus and method for a cache coherent shared memory multipro

Details Apparatus and method for a cache coherent shared memory multipro Apparatus and method for a cache coherent shared memory multipro

1997-12-07

2000-05-16

Sheikh, Ayaz R.

Electrical computers and digital data processing systems: input/

Intrasystem connection

710 29, 710 30, 710 52, 709233, 711110, 711131, 711149, G06F 1208

Patent

active

06065077&

ABSTRACT:
The system and method for operating a cache-coherent shared-memory multiprocessing system is disclosed. The system includes a number of devices including processors, a main memory, and I/O devices. Each device is connected by means of a dedicated point-to-point connection or channel to a flow control unit (FCU). The FCU controls the exchange of data between each device in the system by providing a communication path between two devices connected to the FCU. The FCU includes a snoop signal path for processing transactions affecting cacheable memory and a network of signal paths that are used to transfer data between devices. Each signal path can operate concurrently thereby providing the system with the capability of processing multiple data transactions simultaneously.

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