Antifuse reroute of dies

Electronic digital logic circuitry – Multifunctional or programmable – Significant integrated structure – layout – or layout...

Reexamination Certificate

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Details

C326S101000, C326S038000, C365S225000

Reexamination Certificate

active

06633183

ABSTRACT:

BACKGROUND AND SUMMARY OF THE INVENTION
The present invention relates generally to integrated circuits, and more particularly to integrated circuits with programmable contacts.
Known semiconductor chips incorporate packaged dies that contain a plurality of contact pads. The contact pads are electrically coupled to discrete external contact pins which extend from the die packaging for interfacing the semiconductor to external components. While this configuration is acceptable in some applications, it has been recognized by the present inventors that certain applications benefit where a signal path within the chip can be rerouted to different physical locations on the packaging.
Known techniques for rerouting the physical termination point on a semiconductor chip sometimes require external components such as frames and packages, such as those used for chip stacking. Further, some techniques are expensive to implement, require a number of components, and take considerable time to fabricate, often resulting in additional testing requirements. Depending upon the sophistication of the process deployed, as many as eight additional steps are required to form a complete chip with a rerouted pin. Further, the additional parts required, the additional testing required and the production speed lost due to the added steps all affect the cost of fabricating chips with rerouted contact pins.
SUMMARY OF THE INVENTION
The present invention overcomes the disadvantages of previously known rerouting and chip stacking techniques. According to the present invention, semiconductor chips are provided with an internally programmable routing circuit to assign signal paths to select connection points. This allows a user to utilize the same chip fabricating apparatus and testing devices for a number of chips that have different final configurations. This technique is useful in any number of applications including enabling and disabling select features of a chip, rerouting the contact pins to accommodate various sockets, and relocating select contact pins such as chip enable, or input/output lines for forming chip stacks. In a chip stack according to the present invention, once the chips are tested, they can be programmed such that select signal paths line up in parallel, while other signal paths are routed to unused pin locations. The chips are then stacked piggyback, or one on top of the other, and the contact pins are electrically coupled together, thus avoiding the need for external frames and pin rerouting schemes.
In accordance with one embodiment of the present invention, a signal routing circuit is provided. A first signal path includes a first segment and a second segment. A logic circuit is coupled to the first segment of the first signal path, while a first connector pad is coupled to the second segment of the first signal path. A routing matrix circuit is in-line with the first signal path disposed between the first and second segments. The routing matrix circuit is programmable between a first state wherein the first segment is coupled to the second segment, and a second state wherein the first segment is decoupled from the second segment. A programming circuit is coupled to the routing matrix circuit for programming the routing circuit between the first and second states. Where there is concern that the programming circuit will introduce signals that may damage circuits or connectors connected to the routing matrix, it is preferable that the programming circuit be capable of isolating the routing matrix circuit from the first and second segments of the first signal path during programming.
In addition to allowing a single signal path to be programmably coupled or decoupled from the circuit logic, the routing matrix circuit may further include a plurality of second segments, each of the plurality of second segments independent from one another and routed to a discrete connection point. Under this arrangement, the first and second states of the routing matrix circuit are programmable between the first segment and each of the plurality of second segments so that the first segment can be isolated from every one of the connectors on the second segment side of the routing matrix. Alternatively, the first segment can be programmed to be routed to one or more of the plurality of second segments to route the first segment between any number of possible physical connection positions. As an alternative to routing one internal signal to any possible combinations of physical external connections, a single physical connection can be routed to any number of internal signal paths. Under this arrangement, the first segment further comprises a plurality of first segments, each of the plurality of first segments independent from one another, and wherein the first and second states of the routing matrix circuit are programmable between each of the plurality of first segments and the second segment. Depending upon the complexity and routing options required, the first segment may further comprise a plurality of first segments, and the second segment may further comprise a plurality of second segments, wherein the routing matrix is programmable to selectively couple and decouple any of the plurality of first segments to any of the plurality of second segments.
The determination of routing configuration for the routing matrix may be stored using at least one antifuse. In one circuit, the antifuse may be disposed serially between the first and second segments of the first signal path. Under this approach, where there is a concern that the programming voltage will damage additional circuitry coupled to the antifuse, the routing matrix circuit further comprises a first programming switch positioned serially between the antifuse and the first segment, the first programming switch is operatively coupled to the programming circuit and is capable of isolating the antifuse from the first segment. A second programming switch is optionally positioned serially between the antifuse and the second segment, the second programming switch operatively coupled to the programming circuit and capable of isolating the second segment from the antifuse.
As an alternative to using the antifuse serially with the first signal path, the antifuse can be used as a control signal to trigger a switching matrix. Under this arrangement, the routing matrix circuit further comprises a switching matrix disposed between the first and second segments of the first signal path, at least one antifuse coupled to a programming circuit, and a sensing circuit coupling the antifuse to the switching matrix. The switching matrix comprises at least one switch and can include additional logic including demultiplexors and decoders depending upon the sophistication of the rerouting required. The sensing circuit outputs at least one switch control signal coding the programmed state of the antifuse. This signal is used to operatively control at least one switch.
The switching matrix coupled to the antifuse sensing circuit can have a first side contact pad, a second side contact pad, and at least one switch disposed between the first side contact pad and the second side contact pad, wherein the switch acts as an open circuit when the antifuse is in a first state, and the switch acts as a closed circuit when the antifuse is in a second state. The first and second states represent blown or programmed, and unblown or unprogrammed states of the antifuse. Further, the contact pads can be implemented merely as connection points to either side of the switching element. Further, the switching matrix may include a plurality of first side contact pads, such that the switch is programmable to selectively couple and decouple the second side contact pad to any of the plurality of first side contact pads. Alternatively, the switching matrix may include a plurality of first side contact pads and a plurality of second side contact pads. Under this arrangement, the switch is programmable to selectively couple and decouple any of the plurality of first side contact pads to any of the

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