Antifuse incorporating tantalum nitride barrier layer

Details Antifuse incorporating tantalum nitride barrier layer Antifuse incorporating tantalum nitride barrier layer

2002-05-28

2004-03-30

Coleman, W. David (Department: 2823)

Semiconductor device manufacturing: process

Direct application of electrical current

To alter conductivity of fuse or antifuse element

Reexamination Certificate

active

06713369

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to antifuses. More particularly, the present invention relates to metal-to-metal antifuses incorporating improved barrier metal layers.
2. The Prior Art
Antifuses are known in the art and find applications in such devices as field programmable gate array (FPGA) integrated circuits in which they are used to program logic module functions and wiring interconnections. An antifuse comprises a pair of conductors spaced apart by an antifuse material which may include a single layer or may include multiple layers.
An antifuse initially exhibits an extremely high resistance between the pair of conductors. An antifuse is programmed by placing a programming potential across the pair of conductors to disrupt the antifuse material and create at least one conductive filament formed from the material from one or both electrodes to provide a low-resistance path between the pair of conductors.
Antifuses are characterized as either substrate antifuses, in which the lower conductor comprises a doped region in a semiconductor substrate and the upper conductor comprises a material such as a metal or polysilicon layer, or metal-to-metal antifuses, in which both the conductors comprise metal layers disposed above the surface of the semiconductor substrate. Substrate antifuses typically employ one or more silicon dioxide and silicon nitride layers as the antifuse material. Metal-to-metal antifuses typically employ a layer of amorphous silicon bounded by TiN diffusion barrier layers as the antifuse material.
Metal-to-metal antifuses have several advantages. They exhibit a lower on resistance than do substrate antifuses. The lower resistance permits higher speed operation of devices that employ them. In addition, because metal-to-metal antifuses are disposed in metal layers lying above the semiconductor substrate, they do not consume any substrate area and can be formed directly above active devices in the substrate, providing substantial savings in chip area.
Presently-employed metal-to-metal antifuses are subject to certain disadvantages which cause serious design constraints. When employed in circuits where substantial currents flow through the metal-to-metal antifuse during its use after programming, the antifuse can “switch off” due to thermally activated processes such as stress voiding and metal electromigration. As a result of this limitation, metal-to-metal antifuses cannot easily be employed in higher current DC paths, such as in Vcc and Vss lines. In addition, care must be taken to design signal paths that do not exceed an upper limit of peak AC current flow through the programmed metal-to-metal antifuse.
BRIEF DESCRIPTION OF THE INVENTION
A method for forming a metal-to-metal antifuse disposed above and insulated from a semiconductor substrate is disclosed. The method comprises forming a first metal layer disposed above and insulated from the semiconductor substrate, forming a layer of antifuse material over and in electrical contact with the first metal layer, forming a second metal layer over and in electrical contact with the layer of antifuse material, and forming at least one barrier layer comprising a layer of TaN between the layer of antifuse material and one of the first and second metal layers.


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