Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2006-06-23
2008-03-04
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S026000, C326S032000
Reexamination Certificate
active
07339399
ABSTRACT:
An impedance control system is composed of a target circuit having a controllable impedance; a replica circuit having a structure identical to the target circuit; a first binary counter providing the replica circuit with a first impedance control code indicative of a counter value of the first binary counter for controlling an impedance of the replica circuit; a comparator comparing a voltage received from the replica circuit with a reference signal; a second binary counter responsive to an output signal from the comparator for being counted up or down; and a control circuit extracting upper multiple bits out of a counter value of the second binary counter, and generating a second impedance control code indicative of the upper multiple bits. The impedance of the target circuit is controlled in response to the second impedance control code.
REFERENCES:
patent: 7038486 (2006-05-01), Aoyama et al.
patent: 2006/0006903 (2006-01-01), Choi et al.
patent: 2001-94409 (2001-04-01), None
patent: 2004-32721 (2004-01-01), None
patent: 2005-26890 (2005-01-01), None
NEC Electronics Corporation
Tran Anh Q.
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