Anti-fuse programming circuit for user programmable integrated

Details Anti-fuse programming circuit for user programmable integrated Anti-fuse programming circuit for user programmable integrated

1996-04-18

1998-01-27

Hudspeth, David R.

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

326 41, 327525, H03K 19177

Patent

active

057125775

ABSTRACT:
An anti-fuse programming circuit for a user programmable integrated circuit which is capable of programming an anti-fuse at the point where a vertical track and a horizontal track cross each other. PMOS transistors are used to selectively supply a program voltage, and half the program voltage to the vertical track and NMOS transistors are used to selectively supply the program voltage and a ground voltage to the horizontal track. According to the present invention, only a voltage approximated to half the program voltage is applied between gate terminals and bulks of transistors used to select program row and column and to supply the program voltage. Therefore, the present transistors can be prevented from breaking down, by enduring only half of a voltage which conventional transistors must endure.

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