Anodic bonding of a stack of conductive and glass layers

Details Anodic bonding of a stack of conductive and glass layers Anodic bonding of a stack of conductive and glass layers

2000-12-13

2002-11-05

Ball, Michael W. (Department: 1733)

Adhesive bonding and miscellaneous chemical manufacture

Methods

Surface bonding and/or assembly therefor

C156S273900, C156S274400, C065S059100

Reexamination Certificate

active

06475326

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method of bonding alternating conductive and glass layers. More particularly, the method pertains to anodic bonding of stacks of alternating conductive and glass layers, where the conductive layer is a metal or semiconductor. The invention has applicability, among other areas, in the formation of such stacks for microcolumns in electron optics, including electron microscopes and lithography apparatus, in the formation of micro electromechanical structures (MEMS), and also in micro opto-electromechanical structures (MOEMS).
BACKGROUND OF THE INVENTION
Stacks of alternating layers of conductive material and glass find use in a number of practical applications such as in electron optics and micro electromechanical structures. Anodic bonding has been one of the techniques used to bond the conductive layer to the glass layer. In some instances, a semiconductor material such as silicon is used as the conductive layer, and the glass layer is a borosilicate glass, such as PYREX® (Corning Glass, Corning, N.Y.) or BOROFLOATO® (Schott Glass Technologies, New York, N.Y.). In the alternative, the glass layer may be a lithium aluminosilicate -&bgr;-quartz glass-ceramic such as Prototype PS-100 available from HOYA Co., Tokyo, Japan. The advantage of this latter glass is that anodic bonding may be performed at a temperature below about 180° C.
A detailed description of use of the HOYA Co. Lithium aluminosilicate -&bgr;-quartz glass-ceramic glass is provided in a publication by Shuichi Shoji et al. entitled: “Anodic Bonding Below 180° C. For Packaging And Assembling Of MEMS Using Aluminosilicate-&bgr;-quartz Glass-Ceramic”, available form IEEE as document 0-7803-3744-1/97, the subject matter of which is hereby incorporated by reference in its entirety. In particular the bonding of Prototype PS-100 glass-ceramic pieces 370 &mgr;m thick to silicon wafers was achieved using anodic bonding at a temperature ranging from about 140° C. to about 180° C., at an applied DC voltage ranging from about 300 V to about 700 V, over a time period of about 10 minutes or less. A comparison is made for bonding the Prototype PS-100 glass relative to #7740 Corning PYREX® glass and relative to #SD-2 HOYA Bonding Glass. In all cases, a single layer of glass is bonded to a layer of silicon.
One conventional approach to anodic bonding is shown in FIG.
1
. In this Figure, conductive layers (silicon layers, by way of example)
108
,
110
,
112
, and
114
are alternated with electrically insulating layers (borosilicate glass, by way of example)
107
,
109
, and
111
. The stack
100
of alternating silicon and glass layers is placed upon a hotplate
106
, which provides both a source of heat input and electrical grounding. Electrical contact
102
is contacted to uppermost silicon layer
108
, while electrical contact
104
is contacted to the hotplate
106
. Silicon layer
108
acts as the upper electrode, while silicon layer
114
/hotplate
106
acts as the lower electrode. Heat is applied to the hotplate
106
and a voltage is applied between the electrodes
108
and
114
/
106
, through all of the layers to be bonded. The heated glass acts as an electrochemcial cell and permits the transfer of current through the borosilicate glass layers
107
,
109
, and
111
. The application of the voltage causes ionized sodium and oxygen to move within the glass and promotes bonding of silicon layer surfaces to glass layer surfaces.
Looking at the process in a little more detail, anodic bonding has been accomplished using either DC voltage or AC voltage. Accordingly, for purposes of the following description, the voltage source in
FIG. 1
is shown in conceptual, rather than structural form.
In the DC voltage technique, a negative DC potential is applied between electrodes
108
and
114
/
106
, followed by application of reverse polarity DC potential between the electrodes
108
and
114
/
106
.
When, for example, electrode
114
/
106
is at ground potential, and electrode
108
is at a negative potential, oxygen ions travel toward surface
132
of glass layer
107
; surface
134
of glass layer
109
; and, surface
136
of glass layer
111
. This enables the covalent bonding of oxygen to silicon at surface
132
between glass layer
107
and silicon layer
110
; at surface
134
, between glass layer
109
and silicon layer
112
; and, at surface
136
, between glass layer
111
and silicon layer
114
. Simultaneously, application of the DC voltage in this manner causes sodium ions that are part of the glass layers to move toward the opposite surface of each glass electrochemical cell. For example, sodium ions move toward surface
131
of glass layer
107
; surface
133
of glass layer
109
; and, surface
135
of glasslayer
111
.
The series connection of the electrochemical cells creates a potential gradient over the entire stack. Since current flows throughout the stack
100
, from top electrode
108
to bottom electrode
114
/
106
, each silicon layer acting as an electrode, the electrode surface includes the entire major surface of each of the stacked silicon layers.
After application of the DC potential in this fashion, in the next step in the anodic bonding process, the voltage is reversed, such that electrode
114
/
106
is at a negative potential, and electrode
108
is at ground. This permits oxygen ions to move within glass layer
107
toward surface
131
; within glass layer
109
toward surface
133
; and within glass layer
111
toward surface
135
. However, the covalent bonding of the oxygen to the silicon at surfaces
131
,
133
, and
135
is weaker due to the presence of the sodium compounds
120
,
122
, and
124
, respectively, which form due to the movement of sodium ions toward these surfaces during the bonding process. Simultaneously with the covalent bonding of surfaces
131
,
133
, and
135
, sodium compounds
126
,
128
, and
130
form at surfaces
132
,
134
, and
136
of glass layers
107
,
109
, and
111
, respectively, weakening the bond between these glass surfaces and the mating silicon surfaces.
In view of the weakened bonds formed at silicon surfaces
131
,
133
and
135
, as described above, an AC voltage anodic bonding technique was devised. By applying an AC voltage, voltage polarities are reversed continuously, thus achieving bonding between all adjoining surfaces of consecutive layers. By applying AC voltage, the concentration of sodium at each interface during bonding is gradually increased during the bonding period. This means the amount of sodium contamination is lower at the beginning of the bonding process, which better facilitates bonding. However, by the end of the process the sodium contamination has reached a significant level, and the overall bond strength between the alternating layers may not be adequate for some applications.
In view of the foregoing deficiencies, it would be desirable to be able to bond semiconductor and glass layers anodically, without the concentration of sodium and sodium compounds at the interface of bonding layers.
SUMMARY OF THE INVENTION
We have developed a method of anodic bonding which directs cations to a location within a bonding structure which is away from critical bonding surfaces. This prevents the formation of compounds comprising the cations at the critical bonding surfaces. The anodic bonding electrode contacts are made in a manner which concentrates the cations and compounds thereof in a portion of the bonded structure which can be removed, or cleaned to remove the compounds from the structure. A device formed from the bonded structure contains minimal, if any, of the cation-comprising compounds which weaken bond strength within the structure. In the alternative, the cations and compounds thereof are directed to a portion of the bonding structure which does not affect the function of a device which includes the bonded structure.


REFERENCES:
patent: 4609968 (1986-09-01), Wilner
patent: 4802952 (1989-02-01), Kobori et al.
patent: 5141148 (1992-08-01), Ichiyawa
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