Annular gate and technique for fabricating an annular gate

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S298000, C257S299000, C257S300000, C257S387000

Reexamination Certificate

active

06794699

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to integrated circuits and, more particularly, to integrated circuits implementing vertical transistors having annular gate structures.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present invention, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Semiconductor memory devices, such as dynamic random access memory (DRAM) devices, are widely used for storing data in systems such as computer systems. A DRAM memory cell typically includes an access device such as a field effect transistor (FET) coupled to a storage device such as a capacitor. The access device allows the transfer of charges to and from the storage capacitor thereby facilitating read and write operations in the memory device. The memory cells are typically arranged in a number of rows and columns to provide a memory array.
With the constantly increasing demand for higher data storage capacity, memory arrays are becoming more dense. Memory density is typically limited by current processing technologies used for fabrication of the memory arrays. One technique for providing higher density memory arrays is to incorporate vertical technology in fabricating the access transistors. Among the concerns in fabricating memory devices is to provide memory cells with minimal leakage to prevent the loss of storage cell data. Further, alpha-particle induced soft errors which alter the data stored in the memory cells should also be considered, and simplification in fabrication techniques may also be desirable.


REFERENCES:
patent: 5244824 (1993-09-01), Sivan
patent: 5312782 (1994-05-01), Yoshihiro et al.
patent: 6261894 (2001-07-01), Mandelman et al.
patent: 6309919 (2001-10-01), Liu et al.
patent: 6316309 (2001-11-01), Holmes et al.
patent: 6326275 (2001-12-01), Harrington et al.
patent: 6335239 (2002-01-01), Agahi et al.
patent: 6399979 (2002-06-01), Noble et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Annular gate and technique for fabricating an annular gate does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Annular gate and technique for fabricating an annular gate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Annular gate and technique for fabricating an annular gate will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3218559

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.