Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-09-02
2008-09-02
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C703S019000
Reexamination Certificate
active
11333863
ABSTRACT:
A method of annotating timing information for a circuit design for performing timing analysis can include determining minimum and maximum clock path delays for registers of a circuit design and computing a difference between the maximum clock path delay and the minimum clock path delay for a destination register of the circuit design. The method further can include adjusting a register timing parameter for the destination register according to the difference and performing a timing verification on the destination register using the adjusted register timing parameter.
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Campbell Scott J.
Escobar Mario
Lujan Jaime D.
Manaker, Jr. Walter A.
Philofsky Brian D.
Cuenot Kevin T.
Dinh Paul
Nguyen Nha
XILINX Inc.
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