Anistropic etching

Details Anistropic etching Anistropic etching

1984-10-17

1985-11-19

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156646, 156656, 156657, 1566591, 156662, 156665, 204192E, 427 38, 427 431, 430313, H01L 21306, B44C 122, C03C 1500, C23F 102

Patent

active

045540489

ABSTRACT:
The specification describes a process for treating patterned VLSI lithographic masks to retain their shape during processing of VLSI wafers. The process avoids the common postbake treatment which tends to cause sagging of the sidewalls of the mask. Retention of vertical sidewalls on the mask edges has been found important for producing vertical sidewalls in layers that are being anisotropically etched.

REFERENCES:
patent: 4436584 (1984-03-01), Bernacki et al.
"High Temperature Flow Resistance . . . ", Journal of Electrochemical Society,: Solid-State Science and Technology, Dec., 1981, pp. 2645-2647, vol. 128, No. 12, Hiraoka et al.
"Plasma Resist Stabilization Technique", (PRIST), IEEE, IEDM Conference Abstracts, 1980, p. 574, W. Ma.

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