Anisotropic polysilicon etching process

Details Anisotropic polysilicon etching process Anisotropic polysilicon etching process

1990-12-20

1993-09-07

Dang, Thi

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156646, 156657, 156662, H01L 2100

Patent

active

052425363

ABSTRACT:
An anisotropic polysilicon etching process in Cl.sub.2 /HBr/He is disclosed. The use of HBr allows etching to occur under high poly:oxide selectivity conditions (e.g., above 40:1) that would otherwise produce lateral etching of the poly under the photoresist mask (isotropy). The selectivity of poly:resist is also increased (e.g., above 4:1). Poly sidewall passivation is enhanced without relying on resist redeposition. Gate oxide loss is also minimized, and anisotropy is realized with increased overetch (e.g., 60%). Exemplary process settings are: 1) 250 mTorr, 190 Watts, 0.5 cm gap, 100 sccm Cl.sub.2, 50 sccm HBr and 40 sccm He; and 2) 270 mTorr, 200 Watts, 0.5 cm gap, 80 sccm Cl.sub.2, 55 sccm HBr and 45 sccm He.

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Controlled Film Formation during CCl.sub.4 Plasma Etching, Bernacki and Kosicki, J. Electrochem. Soc., Aug., 1984.
Selectivity and Feature Size Control, Dry Etching.

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