Analog-to-digital converter and method of fabrication

Details Analog-to-digital converter and method of fabrication Analog-to-digital converter and method of fabrication

1999-09-10

2001-12-11

Lee, Eddie (Department: 2815)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

Having heterojunction

C438S353000, C438S357000, C438S369000, C438S370000, C438S372000, C438S375000, C438S377000

Reexamination Certificate

active

06329260

ABSTRACT:

TECHNICAL FIELD
The present invention relates to electronic semiconductor devices and methods of fabrication, and, more particularly, to semiconductor devices useful for conversion between analog and digital signals and fabrication methods integrating both bipolar and field effect devices.
BACKGROUND AND SUMMARY OF THE INVENTION
Digital processing and transmission of electrical signals has become commonplace even for basically analog information. Examples range from handheld digital voltmeters to the transition beginning in the 1960s of the public long distance telephone network from analog transmission to pulse code modulation (PCM) digital transmission. Application of digital methods to analog information requires an analog-to-digital (A/D) conversion, and the linearity, resolution, and speed of such conversion depends upon the application. For example, digital voltmeters usually call for A/D conversion with good linearity and resolution (18-bits) but which may be slow (1 Hz); whereas, video applications demand high speed (30 million samples and conversions per second) but tolerate low resolution (8-bits) and poor linearity. Intermediate requirements of 12-bit resolution, good linearity, and 3 Msps (million samples per second) speed appear in applications such as medical imaging with ultrasound, robotic control, high speed data acquisition, process control, radar signal analysis, disk drive head control, vibration analysis, waveform spectral analysis, and so forth. Multichannel information acquisition with arrays of A/D converters leads to another requirement: small aperture jitter so that synchronism of the channels can be maintained.
Well known types of A/D converters include the successive approximations converter which produces a digital output by a succession of trial-and-error steps using a digital-to-analog converter (DAC) and the flash converter which compares an input signal to multiple reference levels simultaneously and outputs a digital version of the closest reference level in a single step. The successive approximations converter provides high resolution and linearity but with low conversion speed, and the flash supplies high speed at the cost of resolution and linearity. Note that a flash converter with, n-bit resolution typically has a voltage divider with 2
n
taps and 2
n
comparators, and this becomes unwieldy for high resolution. See, however, copending U.S. patent application Ser. No. 696,241, filed May 6, 1991 and assigned to the assignee of the present application. A compromise between these two types is the two-step flash A/D converter which uses a first coarse flash conversion to find the most significant bits and then reconstructs an analog signal from first flash output and subtracts this from the input signal to create an error signal from which a second flash conversion finds the least significant bits. Generally see Grebene,
Bipolar and MOS Analog Integrated Circuit Design
(Wiley-Interscience 1984), page 871. Generally, it is desirable that A/D converters combine still higher speed and resolution with lower noise.
Methods of fabrication used for various semiconductor devices include the combination of bipolar transistors with CMOS transistors (BiCMOS), with analog portions of the integrated circuit using bipolar transistors for their low noise and digital portions using CMOS transistors for their high packing density. See for example R. Haken et al, “BiCMOS Processes for Digital and Analog Devices,” Semiconductor International 96 (June 1989). However, improved BICMOS fabrication methods are needed to achieve higher speed and resolution with lower noise on a monolithic circuit.
The present invention provides a monolithic two-step flash A/D converter with high speed and resolution and a BICMOS method of fabrication applicable to such converters and other integrated circuits.


REFERENCES:
patent: 3414783 (1968-12-01), Mooke
patent: 3466467 (1969-09-01), Houcke et al.
patent: 3967269 (1976-06-01), Fletcher
patent: 4051392 (1977-09-01), Rosenthal et al.
patent: 4128775 (1978-12-01), Frederiksen et al.
patent: 4270081 (1981-05-01), Hareyama
patent: 4302718 (1981-11-01), Schade, Jr.
patent: 4316102 (1982-02-01), Butler
patent: 4323794 (1982-04-01), Hoehn
patent: 4323795 (1982-04-01), Holloway et al.
patent: 4450366 (1984-05-01), Malhi et al.
patent: 4507573 (1985-03-01), Nagano
patent: 4528463 (1985-07-01), Kung
patent: 4558242 (1985-12-01), Tuthill et al.
patent: 4572966 (1986-02-01), Hepworth
patent: 4618816 (1986-10-01), Monticelli
patent: 4639715 (1987-01-01), Doluca
patent: 4716372 (1987-12-01), Fauser et al.
patent: 4719373 (1988-01-01), Masuda et al.
patent: 4763107 (1988-08-01), Koen et al.
patent: 4830973 (1989-05-01), Mastroianni
patent: 4903023 (1990-02-01), Evans et al.
patent: 4908621 (1990-03-01), Polonio et al.
patent: 4926069 (1990-05-01), Yamazaki
patent: 4945260 (1990-07-01), Naghshinek et al.
patent: 4949052 (1990-08-01), Chigira
patent: 4973857 (1990-11-01), Hughes
patent: 4973976 (1990-11-01), Lee et al.
patent: 4994887 (1991-02-01), Hutter
patent: 4999523 (1991-03-01), Eham et al.
patent: 5049806 (1991-09-01), Urakawa et al.
patent: 5055722 (1991-10-01), Latos et al.
patent: 5065208 (1991-11-01), Sha et al.
patent: 5070332 (1991-12-01), Kaller et al.
patent: 5087830 (1992-02-01), Cave et al.
patent: 5105194 (1992-04-01), Mizunoue
patent: 5111061 (1992-05-01), Masuda
patent: 5121185 (1992-06-01), Tamba et al.
patent: 5124582 (1992-06-01), Nakamura et al.
patent: 5144159 (1992-09-01), Frisch et al.
patent: 5153694 (1992-10-01), Kishi
patent: 5175060 (1992-12-01), Tsai et al.
patent: 5214316 (1993-05-01), Nagai
patent: 5214328 (1993-05-01), Ohi
patent: 5429959 (1995-07-01), Smayling
patent: 1 512 639 (1969-04-01), None
patent: 03 016 108 (1980-10-01), None
patent: 0 174 736 (1986-03-01), None
patent: 0 236 525 (1987-09-01), None
patent: 0 249 665 (1987-12-01), None
patent: 2258058 (1975-08-01), None
patent: 57-79-457 (1982-05-01), None
patent: 58-196464 (1983-11-01), None
patent: 363-256015 (1988-10-01), None
patent: 1-32647 (A) (1989-02-01), None
patent: 40407456 (1992-03-01), None
European Patent Office Communication mailed Mar. 25,1996.
L. Wakeman, “Silicon-Gate C-MOS Chips Gain Immunity to SCR Latchup”,Electronics International, vol. 56 (1983), No. 16., New York, pp. 136-140.
Translation of Specification of the French Patent No. 2,258,058.

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