Analog sensing of memory cells in a solid state memory device

Details Analog sensing of memory cells in a solid state memory device Analog sensing of memory cells in a solid state memory device

2011-03-01

2011-03-01

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S185030, C365S185190, C365S185210, C365S185220, C365S208000, C365S214000

Reexamination Certificate

active

07898885

ABSTRACT:
A memory device that includes a sample and hold circuit coupled to a bit line. The sample and hold circuit stores a target threshold voltage for a selected memory cell. The memory cell is programmed and then verified with a ramped read voltage. The read voltage that turns on the memory cell is stored in the sample and hold circuit. The target threshold voltage is compared with the read voltage by a comparator circuit. When the read voltage is at least substantially equal to (i.e., is substantially equal to and/or starts to exceed) the target threshold voltage, the comparator circuit generates an inhibit signal.

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