Analog output buffer circuit

Static information storage and retrieval – Systems using particular element – Capacitors

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36518905, G11C 1300

Patent

active

056616805

ABSTRACT:
An analog output buffer circuit having a low quiescent power dissipation and a high current-driving capability is disclosed. In accordance with a preferred embodiment of the present invention, the analog output buffer circuit includes a capacitor and three transistors. The first transistor is coupled between a power supply and an output. The gate of the first transistor is utilized for receiving input signals. The second transistor is coupled between the output and ground. The capacitor is coupled between a gate of the first transistor and a gate of the second transistor such that voltages at the gate of the first transistor are related to voltages at the gate of the second transistor via the capacitor. Finally, the third transistor is coupled between the gate of the second transistor and a current source. This configuration allows the analog output buffer circuit to have a high current-driving capability while maintaining a low power dissipation during the quiescent period.

REFERENCES:
patent: 3912949 (1975-10-01), Kalisvaart
patent: 4543494 (1985-09-01), Wakimoto
patent: 5307471 (1994-04-01), Ishikawa
patent: 5334889 (1994-08-01), Hisaka
patent: 5357211 (1994-10-01), Bryson et al.
patent: 5408150 (1995-04-01), Wilcox

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