Analog MOSFET devices

Details Analog MOSFET devices Analog MOSFET devices

1999-01-06

2001-11-13

Fourson, George (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S408000, C438S305000

Reexamination Certificate

active

06316809

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to analog circuits using MOS field effect transistors (MOSFETs).
BACKGROUND OF THE INVENTION
Due to the predominance of digital circuits in integrated circuit technology most design efforts focus on optimizing digital circuit characteristics. Although a wide variety of applications exist for analog circuits, efforts to improve analog circuit performance are usually secondary to those devoted to digital circuits. In digital IC design, a major concern is threshold voltage, to ensure that all devices turn on or off at the same signal level. On-current and off-current are also important parameters in digital IC applications. For analog device performance, gain (gm) and bandwidth are the parameters of interest.
As IC technology advances, and IC devices shrink in size, some IC performance characteristics are affected positively and some negatively. For example, assuming a square law analog device, g
m
is proportional to the square root of the drain current for a given W/L ratio. Therefore, as devices are scaled down, capacitance C increases and g
m
increases (for a fixed W/L ratio and bias current) and circuits with higher speed are achievable. However, the output impedance r
out
decreases linearly with L as the device is shrunk. Consequently, as the technology advances and devices are scaled down it would be desirable to have a method for improving r
out
in order to maximize analog device performance.
SUMMARY OF THE INVENTION
We have recognized that an important parameter affecting the gain of an analog MOS transistor is the depletion width at the drain of the device. We have designed an MOS transistor structure which has reduced drain depletion width without adverse effects on other device parameters. This structure has an implant added to the lightly doped drain (LDD) with a conductivity type opposite to that of the LDD and a doping level higher than the channel doping. This added implant confines the spread of the depletion layer and reduces its width. A relatively small confinement results in a significant increase in output impedance of the device, and a corresponding increase in transistor gain.
Double implanted LDD devices have been used in short channel digital ICs to reduce I
off
at V
ds
=V
dd
, but not in analog devices where V
ds
is much lower than V
dd
. Short channel is defined in this context as less than twice the minimum design rule for the technology used. The primary objective of a double implanted LDD in short channel digital devices is to control the threshold voltage, V
T
, within specified limits. Thus the use of double implanted LDDs in digital devices is directed at adjusting V
T
by a significant amount, e.g., greater than 50 mV, and typically greater than 100 mV. However, the effect of this adjustment in a transistor performing an analog function is undesirable. The double implanted LDD of this invention improves output impedance in devices performing analog functions without significantly affecting the threshold voltage. It also improves output impedance in relatively long channel transistors, i.e. where channel length is greater than twice the minimum design rule. For example, in 0.25 &mgr;m technology, relatively long channel transistors may have channel lengths greater than 0.5 &mgr;m. In these devices short channel effects are not an issue, and double diffused LDDs of the prior are inapplicable.


REFERENCES:
patent: 5488249 (1996-01-01), Crafts
patent: 5512499 (1996-04-01), Cambou et al.
patent: 5532508 (1996-07-01), Kaneko et al.
patent: 5541548 (1996-07-01), Crafts
patent: 5811341 (1998-09-01), Davies et al.
patent: 5903029 (1999-05-01), Hayashida et al.
patent: 5920104 (1999-07-01), Nayak et al.
patent: 6078082 (2000-06-01), Bulucea
patent: 6078086 (2000-06-01), Park
patent: 6087690 (2000-07-01), Chi
patent: 6127700 (2000-10-01), Bulucea

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