Analog autonomous test bus framework for testing integrated circ

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

324 731, 371 225, G01R 3128

Patent

active

057173290

ABSTRACT:
To improve testability of analog or mixed analog/digital circuit modules mounted on a carrier, three-way switches are placed at input and output ports of the circuit modules. The switches can operate to establish signal connections between a test bus and core circuits inside the modules. The switches can also establish signal connections between the test bus and glue circuits disposed between the modules.

REFERENCES:
patent: 4395767 (1983-07-01), Van Brunt et al.
patent: 4441075 (1984-04-01), McMahon
patent: 4509008 (1985-04-01), DasGupta et al.
patent: 4791358 (1988-12-01), Sauerwald et al.
patent: 4879717 (1989-11-01), Sauerwald et al.
patent: 4918379 (1990-04-01), Jongepier
patent: 5107208 (1992-04-01), Lee
patent: 5214655 (1993-05-01), Eichelberger et al.
patent: 5294882 (1994-03-01), Tanaka
patent: 5379308 (1995-01-01), Nhuyen et al.
patent: 5391984 (1995-02-01), Worley
patent: 5416409 (1995-05-01), Hunter
IEEE Standard 1149. Jan. 1990.
Freeman, "Testing Large Analog/Digital Signal Processing Chips", IEEE Transactions on Consumer Electronics, vol. 36, No. 4, Nov. 1990, pp. 813-818.
E.J. McCluskey et al., "Design for Autonomous Test", IEEE Transactions on Computers, vol. C-30, No. 11, pp. 886-875, Nov. 1981.
K.D. Wagner et al., "Design for Testability for Mixed Signal Integrated Circuits", Proceedings of the IEEE 1988 International Test Conference, paper 39.1, pp. 823-828. (Unavailable Month).
P. Fasang et al., "Design for Testability for Mixed Analog/Digital ASICs", Proceedings of the IEEE 1988 Custom Integrated Circuits Conference, pp. 16.5.1-16.5.4, 1988. (Unavailable Month).
N-C Lee, "Autonomous Test Scheme for Analog ASICs", Proceedings: The Third Annual IEEE ASIC Seminar and Exhibit, Sep. 17-21, 1990, pp. P8-3.3-P8-3.5.
K.T. Kornegay et al., "A Test Controller Board for TSS", Proceedings: First Great Lakes Symposium on VLSI, pp. 38-42. (Unavailable Date).
S. Freeman, "A Test Strategy for a Bit-Serial VLSI Chip with Analog IO", Proceedings of the IEEE 1990 Custom Integrated Circuits Conference, May 13-16, 1990, pp. 28.71-28.7.5.
Goodenough, "Build Mixed-Signal ASICs without Analog Cells", Electronic Design, pp. 163-165, Sep. 12, 1991.
Hulse et al., "Panel: P1149.4 Mixed-Signal Test Bus Framework Proposal", International Test Conference 1992 Proceedings, Paper 29.1-29.3, Sep. 1992.
Proceedings Int. Test Conf. 1993, 16 Oct. 1993, pp. 309-322, by Parker et al.
Proceedings Int. Test Conf. 1993, 16 Oct. 1993, pp. 300-308, by Thatcher et al.
Journal of Electronic Testing, vol. 4, No. 4, Nov. 1993, pp. 361-368 by N. Lee.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Analog autonomous test bus framework for testing integrated circ does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Analog autonomous test bus framework for testing integrated circ, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Analog autonomous test bus framework for testing integrated circ will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2079903

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.