Amplifier and semiconductor memory device having the same

Details Amplifier and semiconductor memory device having the same Amplifier and semiconductor memory device having the same

1996-07-05

1997-12-16

Nelms, David C.

Static information storage and retrieval

Read/write circuit

For complementary information

365205, 365207, 365208, 327 51, G11C 700, G11C 702

Patent

active

056993056

ABSTRACT:
A amplifier coupled to first and second power supply lines includes a first pair of cross-coupled transistors connected to the first power supply line and a pair of output terminals, and a second pair of cross-coupled transistors connected to the second power supply line. The amplifier includes a reset circuit which is provided between the first and second pairs of cross-coupled transistors and shortcircuits the pair of output terminals in response to a pair of predetermined control signals. The amplifier includes a pair of input transistors connected to the second pair of cross-coupled transistors, and a pair of non-linear elements which are provided between the first and second pairs of cross-coupled transistors.

REFERENCES:
patent: 4542483 (1985-09-01), Procyk
patent: 4551641 (1985-11-01), Pelley, III
patent: 4816706 (1989-03-01), Dhong et al.
patent: 5017815 (1991-05-01), Shah et al.
patent: 5023841 (1991-06-01), Akrout et al.
patent: 5216634 (1993-06-01), Takano et al.
patent: 5410197 (1995-04-01), Krenik
patent: 5467312 (1995-11-01), Albon et al.
Leo C. M. G. Pfennings, et al., "Differential Split-Level CMOS Logic for Subnanosecond Speeds", IEEE Journal of Solid-State Circuits, vol. sc-20, No. 5, Oct. 1985, pp. 1050 -1055.

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