Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-02-01
2004-08-03
Wilson, Allan R. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S296000, C257S301000, C257S302000, C257S303000, C257S304000, C257S306000, C257S310000, C257S311000, C438S238000, C438S239000
Reexamination Certificate
active
06770924
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to semiconductor fabrication and in particular to a capacitor structure and a method to form same that has a bottom plate made from a layer of material comprising titanium nitride.
BACKGROUND OF THE INVENTION
During semiconductor fabrication of storage capacitors, recent attention has been paid to barium strontium titanate (BST), lead zirconium titanate (PZT) and lead lanthanum titanate (PLZT) for use as capacitor dielectric materials. Such dielectric materials possess a high dielectric constant and are particularly attractive for use in the formation of storage capacitors in high density memory devices.
One major hurdle to overcome to incorporate these materials into present day designs is the fact that during chemical vapor deposition (CVD), the underlying capacitor electrode (or bottom plate) is exposed to oxygen at high temperatures which oxidizes the exposed bottom plate.
For example, a capacitor made up of a polysilicon-BST sandwich is reduced in capacitance due to a thin silicon dioxide layer that forms on the polysilicon bottom plate. A platinum covering on the polysilicon has been suggested to avoid the oxidation of the polysilicon. Unfortunately, during the thermal cycles the platinum undergoes physical degradation due to the out-diffusion of the conductive dopant atoms resident in the polysilicon into the platinum.
Also, sputtered titanium nitride (TiN), titanium chloride (TiCl
4
) and CVD TiN have been known to fail due to the out-diffusion, along the grain boundaries of the sputter material, of conductive dopant atoms resident in the polysilicon.
The present invention teaches a method and structure that can efficiently and reliably fabricate capacitors using a material that possesses a high dielectric constant.
SUMMARY OF THE INVENTION
The present invention describes a capacitor formed in a semiconductor device, the capacitor comprising:
a TiN comprising layer making contact with a diffusion region of an access device, the TiN comprising layer is patterned to serve as a bottom capacitor plate;
a layer of dielectric material overlying the patterned TiN comprising layer; and
a top capacitor plate.
A method for forming a capacitor of the present invention is described in semiconductor fabrication process that comprises the steps of:
providing an opening to a diffusion region of an underlying substrate;
forming a TiN comprising layer to make contact with the diffusion via the opening;
patterning the TiN comprising layer into an individual bottom capacitor plate;
forming a layer of dielectric material; and
forming a top capacitor plate.
REFERENCES:
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patent: 5192589 (1993-03-01), Sandhu
patent: 5246881 (1993-09-01), Sandhu et al.
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patent: 5335138 (1994-08-01), Sandhu et al.
patent: 5434044 (1995-07-01), Nulman et al.
patent: 5466629 (1995-11-01), Mihara et al.
patent: 5489548 (1996-02-01), Nishioka et al.
patent: 5504041 (1996-04-01), Summerfelt et al.
patent: 6081034 (2000-06-01), Sandhu et al.
patent: 2245762 (1992-01-01), None
patent: WO 87/05152 (1987-08-01), None
Micro)n Technology, Inc.
Ortiz Edgardo
Wilson Allan R.
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