Amorphous silicon combined with resurf region for termination fo

Details Amorphous silicon combined with resurf region for termination fo Amorphous silicon combined with resurf region for termination fo

1997-03-20

2000-08-08

Loke, Steven H.

Active solid-state devices (e.g., transistors, solid-state diode

With means to increase breakdown voltage threshold

In integrated circuit

257488, 257493, 257646, 257640, 257339, H01L 2358, H01L 2976

Patent

active

06100572&

ABSTRACT:
A termination structure for semiconductor devices and a process for fabricating the termination structure are described and include a layer of amorphous silicon for passivating and terminating the device junctions. The layer of amorphous silicon is deposited atop the metal contact and atop and overlying insulation layer and expose the source pad. A layer of silicon nitride may be deposited atop the layer of amorphous silicon. The layer of amorphous silicon minimizes gate leakage.

REFERENCES:
patent: 5173435 (1992-12-01), Harada
patent: 5374833 (1994-12-01), Nariani et al.
patent: 5523604 (1996-06-01), Merrill
patent: 5629552 (1997-05-01), Zommer
patent: 5723882 (1998-03-01), Okabe et al.

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