Amorphizing ion implant method for forming polysilicon...

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure

Reexamination Certificate

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C257S345000, C257S408000, C257S607000, C257S655000

Reexamination Certificate

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07045876

ABSTRACT:
A method for fabricating a polysilicon emitter bipolar transistor employs a pair of ion implant methods. A first of the ion implant methods implants a portion of an intrinsic base region interposed between an extrinsic base region and a polysilicon emitter layer with an amorphizing non-active dopant. A second of the ion implant methods implants the polysilicon emitter layer with an active dopant to form a doped polysilicon emitter layer. The polysilicon emitter bipolar transistor is fabricated with enhanced performance.

REFERENCES:
patent: 4977098 (1990-12-01), Yu et al.
patent: 5468974 (1995-11-01), Aronowitz et al.
Lurng Shehng Lee et al, “Reduction of Exitaxial Alignment in n+ -p poly-Si Emitter Diode due to Gettering of P and As by Ar Implantation”, Electronics letters 16, Mar. 2000, vol. 36, No. 6, pp. 579-581.
Xiao Hong, “Introduction to Semiconductor Manufacturing Technology”, 2001 pp. 67-69, pp. 78-79.

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