AMBA slave modular bus interfaces

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation

Reexamination Certificate

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Details

C710S005000, C710S006000, C710S040000, C710S052000, C710S055000

Reexamination Certificate

active

07062577

ABSTRACT:
A circuit generally comprising a plurality of read input registers, a read output register, a write input register and a plurality of write output registers is generally disclosed. The read input registers may be configured to buffer a first read signal received within a plurality of first transfers. The read output register may be configured to transmit the first read signal in a second transfer. The write input register may be configured to buffer a first write signal received in a third transfer. The write output registers may be configured to transmit the first write signal within a plurality of fourth transfers.

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“AMBA™ Specification” (Rev. 2.0), May 13, 1999, 230 pages.

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