AMBA-based secondary cache controller and method of...

Details AMBA-based secondary cache controller and method of... AMBA-based secondary cache controller and method of...

2006-03-28

2006-03-28

Padmanabhan, Mano (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S100000, C711S122000, C711S125000

Reexamination Certificate

active

07020745

ABSTRACT:
A secondary cache controller, a method of operating a secondary cache and a secondary cache incorporating the controller or the method. In one embodiment, the controller includes: (1) configuration registers that allow at least one cacheable memory range to be defined and (2) a standard bus interface that cooperates with the configuration registers to allow the secondary cache controller to operate in: (2a) a configuration mode in which values are written to the configuration registers via only the standard bus interface to define the at least one cacheable memory range and (2b) an operating mode in which the values govern operation of the secondary cache controller absent external cache control instructions.

REFERENCES:
patent: 6829692 (2004-12-01), Schmisseur et al.

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