Alternate selection of virtual data buffer pathways

Details Alternate selection of virtual data buffer pathways Alternate selection of virtual data buffer pathways

1997-09-25

2000-05-30

Peikari, B. James

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

710 53, 710111, G06F 13368

Patent

active

06070201&

ABSTRACT:
A memory control device having a plurality of data transfer paths including a storage device group comprising a plurality of storage devices for storing data and a buffer memory group comprising multiple buffer memories for storing transferred data, dividing files into multiple blocks for storing blocks in multiple storage devices on different data transfer paths, and executing control to read data from the storage device to be output with a request from a connected terminal to the buffer memory wherein storage devices on different paths create multiple virtual storage device groups, and buffer memories create virtual buffer memory groups. The memory control device comprises a data output control for executing control in a first cycle, the data being temporarily dividedly stored in a prescribed virtual storage device group. In a second cycle the device outputs data stored in the virtual buffer memory group and by alternately repeating first and second cycles, data read from the plural virtual buffer memories group is switched.

REFERENCES:
patent: 5838888 (1998-11-01), Oda
patent: 5860060 (1999-01-01), Li et al.
patent: 5901110 (1999-05-01), Jang

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