Allocation of packets and threads

Electrical computers and digital processing systems: virtual mac – Task management or control

Reexamination Certificate

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Details

C718S101000, C718S102000, C718S106000, C719S310000

Reexamination Certificate

active

10300066

ABSTRACT:
The disclosure includes description of a method of processing packets using threads. The method includes processing a packet by a single thread in a first packet processing pipeline stage and processing the packet by multiple threads in a second packet processing pipeline stage.

REFERENCES:
patent: 6836808 (2004-12-01), Bunce et al.
patent: 2003/0043803 (2003-03-01), Hooper
patent: 2003/0046517 (2003-03-01), Lauterbach
patent: 2003/0067934 (2003-04-01), Hooper et al.
patent: 2003/0110166 (2003-06-01), Woolrich et al.
patent: 2003/0163589 (2003-08-01), Bunce et al.
patent: 2003/0188141 (2003-10-01), Chaudhry et al.
patent: 2003/0236919 (2003-12-01), Johnson et al.
patent: 2004/0052269 (2004-03-01), Hooper et al.
patent: 2004/0059828 (2004-03-01), Hooper et al.
patent: 2004/0085901 (2004-05-01), Hooper et al.
INTEL: Design Document; MicroACE; 2001, Revision 1.0; pp. 1-39.
INTEL: Advanced IXP1200 Microengine Programming; IXP1200 Network Processor IDF Spring 2001; 44 pages.
Intel WAN/LAN Access Switch Example Design for the Intel IXP1200 Network Processor; Aplication Note; May 2001; Order No. 273528-001; 20 pages.
IXP1200 Network Processor; Microengine C RFC 1812 Layer 3 Forwarding Example Design; Application Note; Sep. 2001, Order No. 278440-001; 13 pages.
Intel IXP1200 Network Processor Macro Library Style Guide; Jun. 2001; pp. 1-1 to 1-8.
WZN/LAN Access Switch Example Design for the Intel IXP1200 Network Processor; product brief; 2001; Order No. 279044-001; 4 pages.
ATM/OC-3 to Fast Ethernet IP Router Example Design; product brief; 2001; Order No. 279046-001; 4 pages.
Adiletta et al: The Next Generation of Intel IXP Network Proccessors; Intel Technical Journal vol. 6, Issue 3, Aug. 15, 2002; 20 pages.
Intel IXP1200 Network Processor Family; Hardware Ref. Manual; Aug. 2001; Part No. 278303-008; pp. 17-49 + cover sheet.
Johnson et al: IXP1200 Programming; The Microengine Coding Guide for the Intel Network Processor Family; pp. 55-97 + cover sheet.
Intel IXP Network Processor; Software Ref. Manual; Mar. 2000; Order No. 278306-003; pp. 3-1 to 3-30 + cover sheet.
Gwennap et al; A Guide to Network Processors, 2nd Ed.; Nov. 2001; 16 pages.
Shah: Understanding Network Processors, Version 1.0; Sep. 4 2001; pp. i-iii, 1-89 + cover sheet.

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