Allocation of branch target cache resources in dependence...

Details Allocation of branch target cache resources in dependence... Allocation of branch target cache resources in dependence...

2006-08-10

2008-11-04

Ellis, Richard (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Branching

Reexamination Certificate

active

07447883

ABSTRACT:
A data processing system includes an instruction fetching circuit2, an instruction queue4and further processing circuits6. A branch target cache, which maybe a branch target address cache8, a branch target instruction cache10or both, is used to store branch target addresses or blocks of instructions starting at the branch target respectively. A control circuit12is responsive to the contents of the instruction queue4when a branch instruction is encountered to determine whether or not storage resources within the branch target cache8, 10should be allocated to that branch instruction. Storage resources within the branch target cache8, 10will be allocated when the number of program instructions within the instruction queue is below a threshold number and/or the estimated execution time of the program instructions is below a threshold time.

REFERENCES:
patent: 4926323 (1990-05-01), Baror et al.
patent: RE35794 (1998-05-01), Johnson
patent: 6609194 (2003-08-01), Henry et al.

Affiliated with

Also associated with

Rating

Allocation of branch target cache resources in dependence... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Allocation of branch target cache resources in dependence..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Allocation of branch target cache resources in dependence... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4033957