Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-12-19
1999-04-27
Bowers, Charles
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438692, 438699, 438975, H01L 214763
Patent
active
058973710
ABSTRACT:
The present invention concerns a process that maintains a second (or "replica") set of alignment marks during existing processing steps used in manufacturing a semiconductor device or integrated circuit, including CMP and other planarization methods. The present invention avoids alignment problems encountered in conventional CMP processes, particularly tungsten CMP. All alignment steps can be realized through one or more subsequent second (or "replica") alignment marks, set and preserved throughout the remaining process steps, thus maintaining alignment integrity. The present method and apparatus concerns a new alignment mark that may be "printed" in a metal layer on the wafer, for example, a local interconnect or contact layer. The new alignment mark is generally not subjected to planarization or to an "open frame" process. The new alignment mark may also be used to re-etch other alignment marks directly onto the layer conventionally causing alignment problems, such as those created following CMP.
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Chatila Ahmad
Sharifzadeh Shahin
Yeh Kuantai
Berry Renee R.
Bowers Charles
Cypress Semiconductor Corp.
Maiorana Christopher P.
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