Alignment pattern and algorithm for photolithographic alignment

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

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438401, 148DIG102, H01L 23544

Patent

active

059820446

ABSTRACT:
Novel triangular alignment marks and a novel algorithm are used to provide improved global alignment of the substrate on a substrate stage in an align-and expose tool. The method provides an improved metrology for aligning to a recessed alignment mark in the substrate having a material layer, such as insulating, polysilicon, and conducting layers that are inadvertently made asymmetric by processing such as chemical/mechanically polishing. The method also employs an algorithm that detects the recessed edges of the triangle and mathematically generates three lines representing the edges of the triangle. The algorithm then generates a family of lines moving inward from the edges of the triangular alignment marks and parallel to the edges until the lines converge to a common point which determines the alignment center for the triangular alignment marks. The algorithm uses the coordinates of the alignment center to position the substrate in the exposure tool for a coarse alignment the photomask for exposing a photoresist layer on the substrate. This new alignment mark and new algorithm minimize misalignment due to asymmetric formation of a material layer over the alignment mark.

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patent: 5503962 (1996-04-01), Caldwell
patent: 5643801 (1997-07-01), Ishihara et al.

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