Chemistry: electrical and wave energy – Processes and products – Coating – forming or etching by sputtering
Reexamination Certificate
2002-05-09
2004-01-13
McDonald, Rodney G. (Department: 1753)
Chemistry: electrical and wave energy
Processes and products
Coating, forming or etching by sputtering
C204S192120, C204S298110, C204S298150, C118S503000, C118S720000, C118S721000, C118S728000, C427S282000, C427S569000
Reexamination Certificate
active
06676812
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to a semiconductor process tool and a method for using the tool and more particularly, relates to an alignment mark shielding ring for use in a semiconductor process chamber without the occurrence of arcing between the alignment mark shielding ring and the process chamber.
BACKGROUND OF THE INVENTION
Physical vapor deposition (PVD) is a frequently used processing technique in the manufacture of integrated circuit chips that involves the deposition of a metallic layer on the surface of a silicon wafer. The technique is also known as a sputtering process. In more recently developed advanced semiconductor manufacturing technology, the PVD technique is frequently used to deposit metallic layers such as TiN as anti-reflective coating or barrier layers.
In a typical PVD process, an inert gas such as argon is first ionized in an electrical field producing a plasma of charged gas particles. The particles are then attracted toward a negatively charged source (or target). The energy of these gas particles physically dislodges, or sputters of atoms of the metallic target material. PVD is a versatile technique in that many different materials can be deposited by using an RF or a DC power source.
In a typical PVD process chamber
10
, as shown in
FIG. 1
, major components of the chamber include a stainless steel chamber body
12
that is vacuum tight and is equipped with a pump
16
capable of reducing the chamber pressure to at least 10
−6
m Torr, a pressure gauge
18
, a sputter source or target
20
, a power supply (not shown), a wafer holder
14
and a clamp ring
22
. The sputter source
20
and the wafer holder
14
are positioned facing each other. The target may be a titanium disc when sputtering of TiN is desired. One of such PVD process chamber is commercially available as Endura® 5500 from Applied Materials, Inc. of Santa Clara, Calif.
The wafer holder
14
is normally a pedestal of a disc shape. In a top surface of the pedestal, metal screws
24
are used as pedestal pins for supporting a wafer
26
at the tips of the screws
24
. The pedestal pins allow a gap of approximately 1 mm to be maintained between the wafer
26
and the top surface
28
of the pedestal body
14
. The distance is necessary such that a subsequently deposited film, for instance, a TiN layer does not glue the wafer to the pedestal surface
28
. A thin TiN layer is frequently used on top of an aluminum-copper film layer as an anti-reflective coating for a subsequent lithography process. In a typical PVD deposition process, a plasma cloud
30
is generated by a cascading ionization reaction in which electrons and ion pairs are formed. For instance, when an electron bumps into an argon atom, it forms an argon ion and another electron. The newly formed electron then collides with another argon atom such that a chain reaction or ionization reaction is started. When the electrons bombard the wafer surface, the surface may be charged to a negative voltage higher than 30 volts.
One of the more important components in a sputter chamber is the clamp ring
22
which serves several functions during a sputter process. For instance, one of the functions is to clamp a wafer to a pedestal heater. The clamp ring holds the wafer in place on the pedestal when a positive gas pressure is applied between the heater and the pedestal such that heat can be efficiently conducted from the heater to the wafer. Another function served by the clamp ring is to allow a predetermined flow of argon to leak from under the wafer into the sputter chamber. A clamp ring is constructed in a circular shape with an oriented cutout to match a wafer's flat side. A hood portion
32
is built into the clamp ring
22
for shadowing purpose to protect the lip of the clamp ring from being coated by the sputtered metal particles. A plane view of the clamp ring
22
and the hood portion
32
of the clamp ring are shown in FIG.
2
.
One other function served by the clamp ring
22
, and specifically by the hood portion
32
is the shielding of specific area along the edge of a wafer that should not be covered by sputtered metal particles. A typical area is the alignment marks which are scribed onto a top surface of a wafer for alignment in various process machines and onto various wafer platforms. An alignment mark would not be recognizable in a subsequent lithography process if covered by sputtered metals. The protection of an alignment mark from sputtered metal particles is therefore an important step in a sputtering process.
FIGS. 3A and 3B
show a conventional physical vapor deposition chamber with a wafer pedestal in a release and in a process position, respectively. The PVD chamber
40
is constructed of a wafer pedestal
42
, a clamp ring
44
, an upper chamber shield
46
and a lower chamber shield
48
which are enclosed in chamber wall
50
. A clamp shield
52
and an adapter plate
54
for mounting the upper shield
46
and the lower shield
48
thereto are further shown in
FIGS. 3A and 3B
.
A perspective view of the major components in the PVD chamber
40
is shown in FIG.
4
. It should be noted that in this conventional construction of a PVD chamber, the clamp ring
44
is not equipped with an extended hood portion for shielding an edge portion of the wafer or for shielding an alignment mark formed on the wafer.
In a modified conventional PVD chamber
60
, as shown in
FIGS. 5A and 5B
, attempts have been made to shield an edge portion of a wafer by an improved clamp ring
64
and to fix the position of the clamp ring in relation to the wafer
26
by alignment pins
66
. In this conventional construction, a modified clamp ring
64
which is equipped with an extended hood portion
70
is used to shield an edge portion
72
of the wafer
26
. The modified clamp ring
64
is further equipped with alignment pins
66
which are fixed to an edge
74
of the clamp ring
64
. Correspondingly located apertures
62
are provided for positioning the alignment pins
66
. The alignment pins
66
and the locating apertures
62
are provided such that the locating pins
66
may enter or exit the locating apertures
62
freely when the clamp ring
64
is lifted up by the wafer pedestal
42
away from the apertures or lowered into the apertures. This is shown in
FIGS. 5A and 5B
in an release and a process position, respectively.
In another modified conventional PVD chamber
80
, as shown in
FIG. 6
, attempts were made to improve the better positioning of the alignment pin
66
in an alignment sleeve
82
. The alignment sleeve
82
, also known as a DC bias isolator, is fabricated of an electrically insulating material. The alignment sleeve
82
provides electrical insulation between the metallic alignment pin
66
and the metallic lower chamber shield
68
. The alignment pin
66
and the lower chamber shield
68
are normally fabricated of stainless steel.
While the alignment sleeve
82
provides the necessary electrical insulation at the beginning of a semiconductor process, i.e., a metal sputtering process, a thin film of metal gradually deposits inside the aperture
84
of the alignment sleeve
82
. For instance, during a TiN deposition process, a thin film of TiN gradually grows on the side wall of the aperture
84
. After the process chamber is used for sputtering a large number of wafers, the thickness of the TiN layer inside the aperture
84
becomes sufficiently large to cause an electrical short between the alignment pin
66
and the lower chamber shield
68
(when the surface of the alignment sleeve
82
becomes electrically conductive). When such electrical short occurs, serious arcing problem may occur on the wafer surface which may lead to the scrap of the entire wafer. The arcing problem must therefore be prevented if at all possible to preserve the yield of the process.
It is therefore an object of the present invention to provide an alignment mark shielding ring that does not have the drawbacks or shortcomings of the conventional alignment mark shielding rings.
It is
McDonald Rodney G.
Taiwan Semiconductor Manufacturing Co. Ltd.
Tung & Associates
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