Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Reexamination Certificate
1999-12-27
2002-12-31
Fahmy, Jr., Wael (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Alignment marks
C438S401000, C438S462000, C438S975000
Reexamination Certificate
active
06501189
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a photolithographic process for manufacturing semiconductor devices. More particularly, the present invention relates to a wafer bearing an alignment mark used to align the wafer with photolithographic exposure equipment, to the manner in such a wafer is produced, to the alignment system which examines the mark to produce the signals used to align the exposure equipment and the wafer, and to the method of aligning the exposure equipment and the wafer.
2. Description of the Related Art
Semiconductor devices typically comprise various circuit patterns stacked on a wafer. The circuit patterns are formed using a photolithographic process. Each circuit pattern formed must be aligned accurately with the circuit pattern which has been formed previously on the wafer. The alignment is achieved by illuminating a predetermined region of the wafer having an alignment mark formed thereon, and using the illuminated region to obtain photoelectric signals indicative of whether the exposure equipment of the photo processing system is properly aligned with the wafer. Typical alignment marks are shown in
FIGS. 1 and 2
.
The alignment mark shown in
FIG. 1
comprises a series of parallel lines. The alignment mark is for use with an off-axis type field image alignment system having a halogen lamp as its source of illumination. The length l of, the width w
1
of and the distance s between the lines
10
of the alignment mark are approximately 30 &mgr;m, 6 &mgr;m and 6 &mgr;m, respectively.
The alignment mark shown in
FIG. 2
comprises a line
20
having a positive slope with respect to an X-Y coordinate system and a line
25
having a negative slope with respect to the X-Y coordinate system. The height h and the width w
2
of the lines
20
and
25
are 82 &mgr;m and 1.5 &mgr;m, respectively.
Now, the wafer on which the alignment mark has been formed has undergone the various processes for forming previous circuit patterns thereon. These processes affect the integrity of the alignment mark. For instance, a chemical mechanical polishing (CMP) process affects the alignment mark to such an extent that the alignment signals derived therefrom are distorted. CMP is widely used for forming a trench isolation region, planarizing an inter-dielectric layer, forming a plug or forming a damascene interconnection in a semiconductor device to secure a high degree of integration for the device.
FIG. 3
is a sectional view of one of the lines of the alignment marks of
FIGS. 1 and 2
, as taken along lines III-III′. A layer
5
having a pattern of lines
10
(
20
) is formed on a wafer
1
, and a layer
30
to be subjected to the CMP process is formed on the layer
5
. When the structure shown in
FIG. 3
undergoes the CMP process, a dishing phenomenon occurs in the layer
30
′ which is left by the CMP process, as shown in FIG.
4
. This is because the alignment marks are composed of lines which are larger (30×6 &mgr;m
2
) than those making up the line pattern of the semiconductor device, and the line density of the pattern of the alignment mark is very low. The amount of material to be removed by the CMP process is set on the basis of the circuit pattern having a relatively high line density. As the CMP process produces a severe dishing phenomenon in the layer
30
′, it is also damaging the pattern of lines
10
(
20
) of the alignment mark.
The abrasion of the pattern of lines in association with the dishing phenomenon is a root cause of the production of distorted photoelectric signals during the alignment process. Distorted alignment signals in turn limit the degree to which the circuit patterns can be precisely aligned.
SUMMARY OF THE INVENTION
It is therefore one object of the present invention to provide an alignment mark which will not be damaged by CMP and thus is capable of being used to produce alignment signals facilitating a precise alignment of the wafer with the exposure equipment.
To achieve this object, the present invention provides a wafer bearing an alignment mark constituted by a plurality of lands or trenches (surface features) formed in a layer underlying a target layer planarized by chemical mechanical polishing, wherein the lands or trenches are arranged as densely as possible such that no dishing occurs in the target layer as the result of the chemical mechanical polishing process.
The spaced apart lands or trenches may be disposed in a 2×2 or larger array.
Alternatively, some of the lands or trenches may be disposed along at least one first line having a positive slope with respect to a reference X-Y coordinate system while the other lands or trenches are disposed along a second line having a negative slope with respect to the reference X-Y coordinate system, the lines being arranged in the shape of a chevron.
It is another object of the present invention to provide an alignment system which produces alignment signals, which can be used to precisely align a wafer with exposure equipment, from an alignment mark on the wafer constituted by spaced apart lands or trenches disposed in a 2×2 or larger array (rows and columns).
To achieve the second object, the present invention provides an alignment system comprising a source of illumination, a light transmitting unit for irradiating a field of a wafer bearing the alignment mark with light emitted from the illumination source and transmitting the light reflecting from the field, and a light collecting unit for collecting the reflected light transmitted thereto by the light transmitting unit, wherein the light collecting unit produces and displays a Y-axis alignment waveform signal indicative of characteristics of the light reflected from the columns of lands or trenches of the alignment mark and an X-axis alignment waveform signal indicative of characteristics of the light reflected form the rows of lands or trenches of the alignment mark.
It is another object of the present invention to provide an alignment system which produces alignment signals, which can be used to precisely align a wafer with exposure equipment, from an alignment mark on the wafer constituted by spaced apart lands or trenches disposed in the shape of a chevron.
To achieve this object, the present invention provides a scanning type of alignment system comprising an illumination source, an alignment sensor head for irradiating a field of a wafer bearing the alignment mark with light emitted from the illumination source and transmitting the light reflecting from the field, and an alignment detection unit for collecting the reflected light transmitted thereto by the light transmitting unit, wherein the alignment sensor head includes a reticle having a pattern in the shape of a cross, and the alignment detection unit includes a first detector section, a second detector section and a third detector section. One of the crossing lines of the pattern of the reticle has the same positive slope as that of one of the lines along which the lands or trenches of the alignment mark are disposed (the plus pattern), and the other of the crossing lines of the reticle has the same negative slope as the line along which the others of the lands or trenches of the alignment mark are disposed (the minus pattern). The pattern of the reticle is scanned across the alignment mark, whereby superimposed images of the reticle pattern and alignment mark are transmitted to the alignment detection unit. The first detector section receives an image comprising light reflecting perpendicular to the wafer surface. The second detector section receives an image comprising light scattered by the plus pattern of the alignment mark. The third detector section receives an image comprising light scattered by the minus pattern of the alignment mark. The three detector sections can be formed by a plurality of light detectors also arranged in the pattern of a cross.
It is still another object of the present invention to provide a method by which the degree of mis-alignment between a semiconducto
Han Young-koog
Kim Young-chang
Ryuk Heung-jo
Fahmy Jr. Wael
Samsung Electronics Co,. Ltd.
Toledo Fernando
Volentine & Francos, PLLC
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