Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
Reexamination Certificate
2007-06-12
2007-06-12
Lane, Jack A. (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Slip control, misaligning, boundary alignment
C712S300000, C709S236000
Reexamination Certificate
active
10649187
ABSTRACT:
A network device includes an alignment module to align payloads of received frames on memory boundaries in a buffer memory. The frames may be Ethernet frames which encapsulate IP (Inernet Protocol) packets as payloads. The alignment module prefixes dummy bytes to the frame header to shift the IP payload into an aligned position in the memory regions of the memory.
REFERENCES:
patent: 3916388 (1975-10-01), Shimp et al.
patent: 6507901 (2003-01-01), Gopalakrishnan et al.
patent: 2005/0132244 (2005-06-01), Milway
IEEE Computer Society, “IEEE Standard for Information Technology—Telecommunications and Information Exchange Betwenn Systems-Local and Metropolitan Area Networks-Specific Requirements-Part 3: Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications”, IEEE Std 802.3-2002, Sections 1-3.
Trinh, Linh, “TCP/IP Sniffer Designs Teaches Basics of Embedded Ethernet, ” Electronic Design Home, ID #2099, Apr. 15, 2002.
Lane Jack A.
Marvell International Ltd.
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