Algorithm mapping, specialized instructions and architecture...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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C711S201000, C715S247000, C715S263000, C715S771000, C717S109000, C717S149000

Reexamination Certificate

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07546438

ABSTRACT:
A smart memory computing system that uses smart memory for massive data storage as well as for massive parallel execution is disclosed. The data stored in the smart memory can be accessed just like the conventional main memory, but the smart memory also has many execution units to process data in situ. The smart memory computing system offers improved performance and reduced costs for those programs having massive data-level parallelism. This smart memory computing system is able to take advantage of data-level parallelism to improve execution speed by, for example, use of inventive aspects such as algorithm mapping, compiler techniques, architecture features, and specialized instruction sets.

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Shine C. Chung, U.S. Appl. No. 10/199,745, filed Jul. 19, 2002.

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