Air-bridge integration scheme for reducing interconnect delay

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having air-gap dielectric

Reexamination Certificate

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C438S422000, C438S622000, C257S522000, C257S758000

Reexamination Certificate

active

06297125

ABSTRACT:

BACKGROUND AND SUMMARY OF THE INVENTION
The present invention relates to integrated circuit structures and fabrication methods.
Background: Circuit Delay
The majority of the circuit delay for sub-0.5 micron gate-length integrated circuits is the delay of the interconnects. Both low inter-level and low inter-line capacitance are important to alleviating this problem, but it has become increasingly important to reduce the inter-line capacitance which dominates at less than 0.8 micron. This is recognized as being a major unresolved challenge to the semiconductor industry.
Parasitic capacitance between conductors hurts device performance, since the capacitive load on the wiring slows down the propagation of signals. Dielectrics with a low dielectric constant k are used around the interconnects because these low-k dielectrics allow little leakage current, as well as decreasing the parasitic capacitance. Current low-k dielectrics which may be used for interconnect isolation include fluorinated silicon dioxide, polymers, spin-on glasses (SOGs), and xerogels, with specific examples being hydrogen-silsequioxane (HSQ, k=2.8), parylene (k=2.4) and acrogel (k=1.7).
For sub-0.5 micron nodes, however, other requirements are needed in addition to a low dielectric constant. It is required that a dielectric also have mechanical strength, dimensional stability, ease of pattern and etch, compatibility with chemical-mechanical polishing, good adhesion to metals and oxides, good thermal conductivity, low moisture absorption, high thermal stability, no film shrinkage, electrically robust, and good gap-fill. The current low-k dielectrics either do not meet, or only marginally meet, these additional requirements. Furthermore, these current low-k dielectrics pose many integration, reliability, and manufacturability problems.
Background: Air-Bridge Structures
The most effective way to reduce interconnect capacitance, and thereby RC delay, is the use of air, which has a dielectric constant of 1, between the interconnects. The formation of large voids between the metal interconnects, called air-bridges, are discussed, for example, in the following references, all of which are hereby incorporated by reference: Ta et al., “Multiple Arbitrary Shape Via-Hole and Air-Bridge Transitions in Multilayered Structures,” 1996 IEEE MTT-S I
NTERNATIONAL
M
ICROWAVE
S
YMPOSIUM
D
IGEST
vol. 2, pp.707-710 (1996); Villeneuve et al., “Air-Bridge Microcavities”, A
PPLIED
P
HYSICS
L
ETTERS
, vol. 67, no. 2, pp. 167-169 (Jul. 10, 1995); and Goldfarb et al., “The Effect of Air Bridge Height on the Propagating Characteristics of Microstrip,” 1 IEEE M
ICROWAVE AND
G
UIDED
W
AVE
L
ETTERS
273 (October 1991). Another method of forming voids is discussed in a pending provisional application of the same assignee, “A Process Scheme to Form Controlled Airgaps Between Interconnect Lines to Reduce Capacitance”, filed May 5, 1997, which received application Ser. No. 60/045,626, and which is hereby incorporated by reference.
A further method for forming air-bridges is disclosed in the article “Use of Air Gap Structures to Lower Intralevel Capacitance” J. G. Fleming et al., P
ROCEEDINGS OF THE
D
IELECTRIC FOR
ULSI M
ETAL
I
NTERCONNECT
C
ONFERENCE
(DUMIC), 1997, February 10-11, p 139-146, which is hereby incorporated by reference. The Fleming article discusses the use of a highly non-conformal dielectric deposited over the metal interconnects. The voids formed in this way can trap chemicals during subsequent processing. To avoid this problem, a layer of hydrogen-silsequioxane (HSQ), a spin-on dielectric, is deposited over the non-conformal dielectric to fill any voids or reentrant features. This HSG layer is then capped by an oxide, which is then planarized. This is expected to give an effective dielectric constant of 1.9.
Air-Bridge Integration Scheme for Reducing Interconnect Delay
The present application discloses a technique to form air-bridges at controlled lateral separations. Such air-bridges are formed using the extremely high HF etch rate of a gap-fill spin-on-glass such as uncured hydrogen-silsequioxane (HSQ) which has an estimated etch rates in HF over 50 times that of thermal oxide. First, the connect lines are protected by a thin layer of a dielectric, such as a high quality silicon dioxide. HSQ is deposited between the interconnect lines, but not cured, and overlain with another dielectric which has a much lower etch rate in HF, such as silicon dioxide. Holes are etched through the upper dielectric layer into the HSQ layer, followed by an HF etch to remove the HSQ, leaving air pockets between the interconnect lines.
The advantages of the disclosed air-bridge integration system include:
meets all dielectric requirements for sub-0.5 micron technologies listed above;
creation of voids is independent of metal spacing (narrow or wide);
a large fraction of the inter-metal spacing is used to form the void;
dielectric seam/pinch-off is more controlled due to the uniform dimension of slots; and
reliability problems are prevented by the high-quality silicon dioxide formed on the metal-line sidewalls.


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Tsai, et al., “Multiple Arbitrary Shape Via Hole and Air-Bridge Transitions in Multilayered Structures”, Dec. 1996 IEEE Transactions on Microwave Theory and Techniques, vol. 44, No. 12, pp. 2504 -2511.
Goldfarb, et al., “The Effect of Air Bridge Height on the Propagation Characteristics of Microstrip”, Oct. 1991 IEEE Microwave and Guided Wave Letters, vol. 1, No. 10, pp. 273-274.
Villeneuve, et al., “Air-Bridge Microcavities”, 1995 American Institute of Physics, Appl. Phys. Lett. 67(2), Jul. 10, 1995, pp. 167-169.
Fleming, et al., “Use of Air Gap Structures to Lower Intralevel Capacitance”, U.S. Department Commerce National Technical Information Service 1997.

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