Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2007-03-30
2010-06-01
Baderman, Scott T (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S033000, C714S044000, C714S048000, C714S057000
Reexamination Certificate
active
07730361
ABSTRACT:
A method of aggregating events in a PCIe (Peripheral Component Interconnect Express) multifunction device minimizes reported error messages, where several functions share a common PCIe interface logic. A predetermined number of function entities with logical gates, connected in daisy chain configuration, process incoming information, and a decision is made whether each function entity will generate a blocking control or a pass-through control. The error messages are aggregated across the function entities in a single clock cycle with the help of an error controller. The functions can be from IEEE 1394 interface, graphics display controller, sound card, PCIe switch, or PCIe to PCI bridge connection. Each function preferably has a different configuration and security level setting for error reporting and messaging. There may be a plurality of parallel daisy chains, and the PCIe device may include three layers namely, a physical layer, data link layer and transaction protocol layer (for error logging, reporting).
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Das Sumit Sadhan
Wojciechowski Roy D.
Baderman Scott T
Brady III Wade J.
Kempler William B.
Schell Joseph
Telecky , Jr. Frederick J.
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