Advanced VLSI metallization

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257SE21577, C257SE21578

Reexamination Certificate

active

07943505

ABSTRACT:
A four layer interconnect structure is disclosed which includes a bottom conductive reactive layer such as titanium, a conductive barrier layer, such as titanium nitride, a conductive layer, such as aluminum-copper alloy, and a top conductive barrier layer, such as titanium nitride. The interconnection structure can be fabricated using conventional sputter deposition technology. The resulting interconnection structure provides a highly conductive thin film structure that provides good contact to tungsten plugs with small contact dimensions, good patternability on fine lines, and good reliability.

REFERENCES:
patent: 4782380 (1988-11-01), Shankar et al.
patent: 4847674 (1989-07-01), Sliwa et al.
patent: 4884123 (1989-11-01), Dixit et al.
patent: 4910580 (1990-03-01), Kuecher et al.
patent: 4924295 (1990-05-01), Kuecher
patent: 4960732 (1990-10-01), Dixit et al.
patent: 4962060 (1990-10-01), Sliwa et al.
patent: 4975389 (1990-12-01), Ryan et al.
patent: 4976839 (1990-12-01), Minoru
patent: 5051812 (1991-09-01), Onuki et al.
patent: 5084412 (1992-01-01), Nakasaki
patent: 5124780 (1992-06-01), Sandhu et al.
patent: 5231053 (1993-07-01), Bost et al.
patent: 5243221 (1993-09-01), Ryan et al.
patent: 5256274 (1993-10-01), Poris
patent: 5270254 (1993-12-01), Chen et al.
patent: 5289035 (1994-02-01), Bost et al.
patent: 5340370 (1994-08-01), Cadien et al.
patent: 5354712 (1994-10-01), Ho et al.
patent: 5364810 (1994-11-01), Kosa et al.
patent: 5366911 (1994-11-01), Lur et al.
patent: 5366929 (1994-11-01), Cleeves et al.
patent: 5368711 (1994-11-01), Poris
patent: 5371410 (1994-12-01), Chen et al.
patent: 5382817 (1995-01-01), Kashihara et al.
patent: 5387550 (1995-02-01), Cheffings et al.
patent: 5393703 (1995-02-01), Olowolafe et al.
patent: 5407861 (1995-04-01), Marangon et al.
patent: 5427666 (1995-06-01), Mueller
patent: 5534463 (1996-07-01), Lee et al.
patent: 5591671 (1997-01-01), Kim
patent: 5817574 (1998-10-01), Gardner
patent: 5824597 (1998-10-01), Hong
patent: 5918147 (1999-06-01), Filipiak
patent: 5994217 (1999-11-01), Ng
patent: 6110828 (2000-08-01), Guo et al.
patent: 6133636 (2000-10-01), Akram
patent: 6204167 (2001-03-01), Taniguchi
patent: 6217721 (2001-04-01), Xu et al.
Takamaro Kikkawa et al., “A Quarter-Micrometer Interconnection Technology Using a TiN/Al-Si-Cu/TiN/Al-Si-Cu/TiN/Ti Multilayer Structure,” IEEE Transactions on Electron Devices, vol. 40, No. 2, Feb. 1993, pp. 296-302.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Advanced VLSI metallization does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Advanced VLSI metallization, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Advanced VLSI metallization will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2659083

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.