Advanced processor with implementation of memory ordering on...

Details Advanced processor with implementation of memory ordering on... Advanced processor with implementation of memory ordering on...

2004-08-31

2008-12-02

Thomas, Shane M (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S148000, C711S117000, C709S251000

Reexamination Certificate

active

07461215

ABSTRACT:
An advanced processor comprises a plurality of multithreaded processor cores each having a data cache and instruction cache. A data switch interconnect is coupled to each of the processor cores and configured to pass information among the processor cores. A messaging network is coupled to each of the processor cores and a plurality of communication ports. In one aspect of an embodiment of the invention, the data switch interconnect is coupled to each of the processor cores by its respective data cache, and the messaging network is coupled to each of the processor cores by its respective message station. Advantages of the invention include the ability to provide high bandwidth communications between computer systems and memory in an efficient and cost-effective manner.

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