Advanced CMOS using super steep retrograde wells

Details Advanced CMOS using super steep retrograde wells Advanced CMOS using super steep retrograde wells

2006-06-20

2006-06-20

Lee, Eddie (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S077000, C257S335000, C257S288000, C257S487000, C257S185000, C257S655000, C257S360000, C257S355000, C257S297000, C257S431000

Reexamination Certificate

active

07064399

ABSTRACT:
The present invention is a method for forming super steep doping profiles in MOS transistor structures. The method comprises forming a carbon containing layer (110) beneath the gate dielectric (50) and source and drain regions (80) of a MOS transistor. The carbon containing layer (110) will prevent the diffusion of dopants into the region (40) directly beneath the gate dielectric layer (50).

REFERENCES:
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patent: 6081010 (2000-06-01), Sanchez
patent: 6271551 (2001-08-01), Schmitz et al.
patent: 6274894 (2001-08-01), Wieczorek et al.
patent: 6310366 (2001-10-01), Rhodes et al.
patent: 6426279 (2002-07-01), Huster et al.

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