Advanced bit line tracking in high performance memory compilers

Static information storage and retrieval – Read/write circuit – Particular read circuit

Reexamination Certificate

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Details

C365S194000, C365S203000, C365S210130, C365S210100

Reexamination Certificate

active

07859920

ABSTRACT:
A method accurately tracks a bit line maturing time for compiler memory. The method includes enabling a dummy word line in response to an internal clock signal. The dummy word line is enabled prior to enabling a real word line. A dummy bit line is matured in response to enabling of the dummy word line. The dummy bit line matures at a same rate that a real bit line matures. The method also includes disabling the dummy word line in response to determining a threshold voltage differential based on monitoring maturation of the dummy bit line. The real word line is enabled a predefined delay after enabling of the dummy word line. Similarly, the word line is disabled the predefined delay after disabling of the dummy word line. In response to disabling the dummy word line, a sense enable signal is generated.

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International Search Report-PCT/US09/035369, International Search Authority-European Patent Office-May 20, 2009.
Written Opinion-PCT/US09/035369, International Search Authority-European Patent Office-May 20, 2009.

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